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Jeffrey L. Miller
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Vancouver, WA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Method and apparatus for cache line state update in sectored cache...
Patent number
9,336,156
Issue date
May 10, 2016
Intel Corporation
Zhongying Zhang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus to lower operating voltages for memory arrays...
Patent number
7,581,154
Issue date
Aug 25, 2009
Intel Corporation
Nivruti Rai
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory array leakage reduction circuit and method
Patent number
7,345,947
Issue date
Mar 18, 2008
Intel Corporation
Jeffrey L. Miller
G11 - INFORMATION STORAGE
Information
Patent Grant
Memory array leakage reduction circuit and method
Patent number
7,164,616
Issue date
Jan 16, 2007
Intel Corporation
Jeffrey L. Miller
G11 - INFORMATION STORAGE
Information
Patent Grant
Tag RAM with selection module for a variable width address field
Patent number
6,425,065
Issue date
Jul 23, 2002
Intel Corporation
David DiMarco
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Detecting states of signals
Patent number
6,298,450
Issue date
Oct 2, 2001
Intel Corporation
Jonathan H. Liu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Reducing timing variance of signals from an electronic device
Patent number
6,175,928
Issue date
Jan 16, 2001
Intel Corporation
Jonathan H. Liu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus to monitor a characteristic associated with an...
Patent number
6,172,546
Issue date
Jan 9, 2001
Intel Corporation
Jonathan H. Liu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Synchronous interface to a self-timed memory array
Patent number
6,061,293
Issue date
May 9, 2000
Intel Corporation
Jeffrey Lee Miller
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Information
Patent Grant
Cache memory having a multiplexor assembly for ordering output on a...
Patent number
5,627,991
Issue date
May 6, 1997
Intel Corporation
R. Kenneth Hose
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Digit reverse for mixed radix FFT
Patent number
5,473,556
Issue date
Dec 5, 1995
Sharp Microelectronics Technology, Inc.
Raul A. Aguilar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method of operating data buffer apparatus
Patent number
4,875,196
Issue date
Oct 17, 1989
Sharp Microelectronic Technology, Inc.
Dieter W. Spaderna
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
METHOD AND APPARATUS FOR CACHE LINE STATE UPDATE IN SECTORED CACHE...
Publication number
20140281251
Publication date
Sep 18, 2014
Zhongying Zhang
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
METHOD AND APPARATUS ON DIRECT MATCHING OF CACHE TAGS CODED WITH ER...
Publication number
20110161783
Publication date
Jun 30, 2011
Dinesh Somasekhar
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Methods and apparatuses for operating memory
Publication number
20090086556
Publication date
Apr 2, 2009
Sapumal Wijeratne
G11 - INFORMATION STORAGE
Information
Patent Application
Method and apparatus to lower operating voltages for memory arrays...
Publication number
20070022360
Publication date
Jan 25, 2007
Nivruti Rai
G11 - INFORMATION STORAGE
Information
Patent Application
Memory array leakage reduction circuit and method
Publication number
20070002673
Publication date
Jan 4, 2007
Jeffrey L. Miller
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Information
Patent Application
Memory array leakage reduction circuit and method
Publication number
20060133185
Publication date
Jun 22, 2006
Jeffrey L. Miller
G11 - INFORMATION STORAGE
Information
Patent Application
TAG RAM WITH SELECTION MODULE FOR A VARIABLE WIDTH ADDRESS FIELD
Publication number
20010003840
Publication date
Jun 14, 2001
DAVID DIMARCO
G06 - COMPUTING CALCULATING COUNTING