Jeffrey Lam

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Wafer probe card integrated with a light source facing a device und...
- Patent number 10,859,625
- Issue date Dec 8, 2020
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lanxiang Wang
- G01 - MEASURING TESTING
Information Patent Grant
Gamma groove arrays for interconnecting and mounting devices
- Patent number 10,656,362
- Issue date May 19, 2020
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Yamin Huang
- G02 - OPTICS
Information Patent Grant
Wedge-shaped fiber array on a silicon-photonic device and method fo...
- Patent number 10,497,820
- Issue date Dec 3, 2019
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Dandan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating electronic devices including substantially...
- Patent number 10,336,608
- Issue date Jul 2, 2019
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Szu Huat Goh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
System for detection of a photon emission generated by a device and...
- Patent number 9,964,589
- Issue date May 8, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Lei Zhu
- G01 - MEASURING TESTING
Information Patent Grant
Defect isolation methods and systems
- Patent number 9,958,502
- Issue date May 1, 2018
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Szu Huat Goh
- G01 - MEASURING TESTING
Information Patent Grant
Defect isolation methods and systems
- Patent number 9,739,831
- Issue date Aug 22, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Szu Huat Goh
- G01 - MEASURING TESTING
Information Patent Grant
Electronic devices including substantially hermetically sealed cavi...
- Patent number 9,718,672
- Issue date Aug 1, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Szu Huat Goh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Methods for evaluating semiconductor device structures
- Patent number 9,613,874
- Issue date Apr 4, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jie Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interposer and methods of forming and testing an interposer
- Patent number 9,601,424
- Issue date Mar 21, 2017
- GLOBALFOUNDRIES, INC.
- Rahul Agarwal
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for evaluating strain of crystalline devices
- Patent number 9,581,506
- Issue date Feb 28, 2017
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jie Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Setup for multiple cross-section sample preparation
- Patent number 9,496,187
- Issue date Nov 15, 2016
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Tsu Hau Ng
- B24 - GRINDING POLISHING
Information Patent Grant
Laser-enhanced chemical etching of nanotips
- Patent number 9,128,117
- Issue date Sep 8, 2015
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- ZhiHong Mai
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Integrated circuit system with through silicon via and method of ma...
- Patent number 8,536,705
- Issue date Sep 17, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for introducing physical damage into an integrate...
- Patent number 8,489,945
- Issue date Jul 16, 2013
- GLOBALFOUNDRIES Singapore Pte, Ltd.
- Zhihong Mai
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit system with through silicon via and method of ma...
- Patent number 8,236,688
- Issue date Aug 7, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit system employing backside energy source for elec...
- Patent number 8,158,513
- Issue date Apr 17, 2012
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Zhihong Mai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of manufacture an integrated circuit system with through sil...
- Patent number 7,960,282
- Issue date Jun 14, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
E-beam inspection structure for leakage analysis
- Patent number 7,939,348
- Issue date May 10, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Victor Seng Keong Lim
- G01 - MEASURING TESTING
Information Patent Grant
Elevated bond-pad structure for high-density flip-clip packaging an...
- Patent number 7,323,406
- Issue date Jan 29, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Victor Seng-Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
GAMMA GROOVE ARRAYS FOR INTERCONNECTING AND MOUNTING DEVICES
- Publication number 20190204525
- Publication date Jul 4, 2019
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Yamin HUANG
- G02 - OPTICS
Information Patent Application
SYSTEM FOR DETECTION OF A PHOTON EMISSION GENERATED BY A DEVICE AND...
- Publication number 20180128874
- Publication date May 10, 2018
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Lei Zhu
- G01 - MEASURING TESTING
Information Patent Application
METHODS FOR FABRICATING ELECTRONIC DEVICES INCLUDING SUBSTANTIALLY...
- Publication number 20170291813
- Publication date Oct 12, 2017
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Szu Huat Goh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
ELECTRONIC DEVICES INCLUDING SUBSTANTIALLY HERMETICALLY SEALED CAVI...
- Publication number 20160347608
- Publication date Dec 1, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Szu Huat Goh
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
INTERPOSER AND METHODS OF FORMING AND TESTING AN INTERPOSER
- Publication number 20160300788
- Publication date Oct 13, 2016
- GLOBALFOUNDRIES, Inc.
- Rahul Agarwal
- G01 - MEASURING TESTING
Information Patent Application
DEFECT ISOLATION METHODS AND SYSTEMS
- Publication number 20160161556
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Szu Huat GOH
- G01 - MEASURING TESTING
Information Patent Application
DEFECT ISOLATION METHODS AND SYSTEMS
- Publication number 20160047858
- Publication date Feb 18, 2016
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Szu Huat GOH
- G01 - MEASURING TESTING
Information Patent Application
SETUP FOR MULTIPLE CROSS-SECTION SAMPLE PREPARATION
- Publication number 20150140688
- Publication date May 21, 2015
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Tsu Hau NG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LASER-ENHANCED CHEMICAL ETCHING OF NANOTIPS
- Publication number 20140242805
- Publication date Aug 28, 2014
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- ZhiHong MAI
- B82 - NANO-TECHNOLOGY
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20120205806
- Publication date Aug 16, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and system for introducing physical damage into an integrate...
- Publication number 20120086468
- Publication date Apr 12, 2012
- Globalfoundries Singapore PTE, LTD.
- Zhihong Mai
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20110237072
- Publication date Sep 29, 2011
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...
- Publication number 20100297844
- Publication date Nov 25, 2010
- Chartered Semiconductor Manufacturing LTD.
- Pradeep Ramachandramurthy Yelehanka
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELEC...
- Publication number 20100087061
- Publication date Apr 8, 2010
- Chartered Semiconductor Manufacturing LTD.
- Zhihong Mai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
E-BEAM INSPECTION STRUCTURE FOR LEAKAGE ANALYSIS
- Publication number 20090057664
- Publication date Mar 5, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Victor Seng Keong LIM
- G01 - MEASURING TESTING
Information Patent Application
Elevated bond-pad structure for high-density flip-clip packaging an...
- Publication number 20060166402
- Publication date Jul 27, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Victor Seng-Keong Lim
- H01 - BASIC ELECTRIC ELEMENTS

Jeffrey Lam

Person

Patents Grantslast 30 patents

Wafer probe card integrated with a light source facing a device und...

Gamma groove arrays for interconnecting and mounting devices

Wedge-shaped fiber array on a silicon-photonic device and method fo...

Methods for fabricating electronic devices including substantially...

System for detection of a photon emission generated by a device and...

Defect isolation methods and systems

Defect isolation methods and systems

Electronic devices including substantially hermetically sealed cavi...

Methods for evaluating semiconductor device structures

Interposer and methods of forming and testing an interposer

Methods for evaluating strain of crystalline devices

Setup for multiple cross-section sample preparation

Laser-enhanced chemical etching of nanotips

Integrated circuit system with through silicon via and method of ma...

Method and system for introducing physical damage into an integrate...

Integrated circuit system with through silicon via and method of ma...

Integrated circuit system employing backside energy source for elec...

Method of manufacture an integrated circuit system with through sil...

E-beam inspection structure for leakage analysis

Elevated bond-pad structure for high-density flip-clip packaging an...

Patents Applicationslast 30 patents

GAMMA GROOVE ARRAYS FOR INTERCONNECTING AND MOUNTING DEVICES

SYSTEM FOR DETECTION OF A PHOTON EMISSION GENERATED BY A DEVICE AND...

METHODS FOR FABRICATING ELECTRONIC DEVICES INCLUDING SUBSTANTIALLY...

ELECTRONIC DEVICES INCLUDING SUBSTANTIALLY HERMETICALLY SEALED CAVI...

INTERPOSER AND METHODS OF FORMING AND TESTING AN INTERPOSER

DEFECT ISOLATION METHODS AND SYSTEMS

DEFECT ISOLATION METHODS AND SYSTEMS

SETUP FOR MULTIPLE CROSS-SECTION SAMPLE PREPARATION

LASER-ENHANCED CHEMICAL ETCHING OF NANOTIPS

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

Method and system for introducing physical damage into an integrate...

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

INTEGRATED CIRCUIT SYSTEM WITH THROUGH SILICON VIA AND METHOD OF MA...

INTEGRATED CIRCUIT SYSTEM EMPLOYING BACKSIDE ENERGY SOURCE FOR ELEC...

E-BEAM INSPECTION STRUCTURE FOR LEAKAGE ANALYSIS

Elevated bond-pad structure for high-density flip-clip packaging an...