Jeffrey P. Burleson

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Fort Collins, CO, US

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Patents Grantslast 30 patents

Information Patent Grant
On chip local MOSFET sizing
- Patent number 7,895,550
- Issue date Feb 22, 2011
- LSI Corporation
- John Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Fully shielded capacitor cell structure
- Patent number 7,154,734
- Issue date Dec 26, 2006
- LSI Logic Corporation
- Richard Schultz
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
THREE-DIMENSIONAL ELECTRONICS PACKAGE
- Publication number 20100244276
- Publication date Sep 30, 2010
- LSI Corporation
- Jeffrey P. Burleson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
On Chip Local MOSFET Sizing
- Publication number 20090265675
- Publication date Oct 22, 2009
- LSI Corporation
- John Q. Walker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Fully shielded capacitor cell structure
- Publication number 20060061935
- Publication date Mar 23, 2006
- Richard Schultz
- H01 - BASIC ELECTRIC ELEMENTS