Jeffrey R. Debord

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Isolated semiconductor layer over buried isolation layer
- Patent number 10,886,164
- Issue date Jan 5, 2021
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated semiconductor layer in bulk wafer by localized silicon epi...
- Patent number 10,516,019
- Issue date Dec 24, 2019
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated semiconductor layer in bulk wafer by localized silicon epi...
- Patent number 10,032,863
- Issue date Jul 24, 2018
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated semiconductor layer over buried isolation layer
- Patent number 9,865,498
- Issue date Jan 9, 2018
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS-based thermopile with reduced thermal conductance
- Patent number 9,853,086
- Issue date Dec 26, 2017
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS compatible thermopile with low impedance contact
- Patent number 9,818,795
- Issue date Nov 14, 2017
- Texas Instruments Incorporated
- Jeffrey R. Debord
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS-based thermopile with reduced thermal conductance
- Patent number 9,496,313
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated semiconductor layer over buried isolation layer
- Patent number 9,472,571
- Issue date Oct 18, 2016
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized region of isolated silicon over recessed dielectric layer
- Patent number 9,466,520
- Issue date Oct 11, 2016
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a CMOS-based thermoelectric device
- Patent number 9,437,799
- Issue date Sep 6, 2016
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS compatible thermopile with low impedance contact
- Patent number 9,437,652
- Issue date Sep 6, 2016
- Texas Instruments Incorporated
- Jeffrey R. Debord
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolated semiconductor layer in bulk wafer by localized silicon epi...
- Patent number 9,330,959
- Issue date May 3, 2016
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Localized region of isolated silicon over dielectric mesa
- Patent number 9,312,164
- Issue date Apr 12, 2016
- Texas Instruments Incorporated
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
CMOS-based thermoelectric device with reduced electrical resistance
- Patent number 9,231,025
- Issue date Jan 5, 2016
- Texas Instruments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-powered integrated circuit with multi-junction photovoltaic cell
- Patent number 8,883,541
- Issue date Nov 11, 2014
- Texas Instruments Incorporated
- Yuanning Chen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Self-powered integrated circuit with multi-junction photovoltaic cell
- Patent number 8,552,470
- Issue date Oct 8, 2013
- Texas Instruments Incorporated
- Yuanning Chen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
ISOLATED SEMICONDUCTOR LAYER IN BULK WAFER BY LOCALIZED SILICON EPI...
- Publication number 20180315816
- Publication date Nov 1, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolated Semiconductor Layer Over Buried Isolation Layer
- Publication number 20180096882
- Publication date Apr 5, 2018
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS-BASED THERMOPILE WITH REDUCED THERMAL CONDUCTANCE
- Publication number 20170062518
- Publication date Mar 2, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolated Semiconductor Layer Over Buried Isolation Layer
- Publication number 20160379866
- Publication date Dec 29, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS COMPATIBLE THERMOPILE WITH LOW IMPEDANCE CONTACT
- Publication number 20160372516
- Publication date Dec 22, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey R. Debord
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED REGION OF ISOLATED SILICON OVER DIELECTRIC MESA
- Publication number 20160225657
- Publication date Aug 4, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Isolated Semiconductor Layer in Bulk Wafer by Localized Silicon Epi...
- Publication number 20160218177
- Publication date Jul 28, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A CMOS-BASED THERMOELECTRIC DEVICE
- Publication number 20160155925
- Publication date Jun 2, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS-BASED THERMOELECTRIC DEVICE WITH REDUCED ELECTRICAL RESISTANCE
- Publication number 20150349021
- Publication date Dec 3, 2015
- Texas Insturments Incorporated
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS COMPATIBLE THERMOPILE WITH LOW IMPEDANCE CONTACT
- Publication number 20150349023
- Publication date Dec 3, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Jeffrey R. Debord
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS-BASED THERMOPILE WITH REDUCED THERMAL CONDUCTANCE
- Publication number 20150349022
- Publication date Dec 3, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Henry Litzmann Edwards
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ISOLATED SEMICONDUCTOR LAYER IN BULK WAFER BY LOCALIZED SILICON EPI...
- Publication number 20150294902
- Publication date Oct 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED REGION OF ISOLATED SILICON OVER DIELECTRIC MESA
- Publication number 20150294895
- Publication date Oct 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LOCALIZED REGION OF ISOLATED SILICON OVER RECESSED DIELECTRIC LAYER
- Publication number 20150294901
- Publication date Oct 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ISOLATED SEMICONDUCTOR LAYER OVER BURIED ISOLATION LAYER
- Publication number 20150294983
- Publication date Oct 15, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Daniel Nelson Carothers
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL
- Publication number 20130295711
- Publication date Nov 7, 2013
- Yuanning Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL
- Publication number 20120126247
- Publication date May 24, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Yuanning Chen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Jeffrey R. Debord

Person

Patents Grantslast 30 patents

Isolated semiconductor layer over buried isolation layer

Isolated semiconductor layer in bulk wafer by localized silicon epi...

Isolated semiconductor layer in bulk wafer by localized silicon epi...

Isolated semiconductor layer over buried isolation layer

CMOS-based thermopile with reduced thermal conductance

CMOS compatible thermopile with low impedance contact

CMOS-based thermopile with reduced thermal conductance

Isolated semiconductor layer over buried isolation layer

Localized region of isolated silicon over recessed dielectric layer

Method of forming a CMOS-based thermoelectric device

CMOS compatible thermopile with low impedance contact

Isolated semiconductor layer in bulk wafer by localized silicon epi...

Localized region of isolated silicon over dielectric mesa

CMOS-based thermoelectric device with reduced electrical resistance

Self-powered integrated circuit with multi-junction photovoltaic cell

Self-powered integrated circuit with multi-junction photovoltaic cell

Patents Applicationslast 30 patents

ISOLATED SEMICONDUCTOR LAYER IN BULK WAFER BY LOCALIZED SILICON EPI...

Isolated Semiconductor Layer Over Buried Isolation Layer

CMOS-BASED THERMOPILE WITH REDUCED THERMAL CONDUCTANCE

Isolated Semiconductor Layer Over Buried Isolation Layer

CMOS COMPATIBLE THERMOPILE WITH LOW IMPEDANCE CONTACT

LOCALIZED REGION OF ISOLATED SILICON OVER DIELECTRIC MESA

Isolated Semiconductor Layer in Bulk Wafer by Localized Silicon Epi...

METHOD OF FORMING A CMOS-BASED THERMOELECTRIC DEVICE

CMOS-BASED THERMOELECTRIC DEVICE WITH REDUCED ELECTRICAL RESISTANCE

CMOS COMPATIBLE THERMOPILE WITH LOW IMPEDANCE CONTACT

CMOS-BASED THERMOPILE WITH REDUCED THERMAL CONDUCTANCE

ISOLATED SEMICONDUCTOR LAYER IN BULK WAFER BY LOCALIZED SILICON EPI...

LOCALIZED REGION OF ISOLATED SILICON OVER DIELECTRIC MESA

LOCALIZED REGION OF ISOLATED SILICON OVER RECESSED DIELECTRIC LAYER

ISOLATED SEMICONDUCTOR LAYER OVER BURIED ISOLATION LAYER

SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL

SELF-POWERED INTEGRATED CIRCUIT WITH MULTI-JUNCTION PHOTOVOLTAIC CELL