Jeffrey Tyhach

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit floorplans
- Patent number 9,219,483
- Issue date Dec 22, 2015
- Altera Corporation
- Christopher F. Lane
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-chip packages with reduced power distribution network noise
- Patent number 9,129,935
- Issue date Sep 8, 2015
- Altera Corporation
- Karthik Chandrasekar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Modular I/O bank architecture
- Patent number 7,378,868
- Issue date May 27, 2008
- Altera Corporation
- Jeffrey Tyhach
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and methods for providing highly effective and area effic...
- Patent number 7,309,906
- Issue date Dec 18, 2007
- Altera Corporation
- Jeffrey Tyhach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ESD protection that supports LVDS and OCT
- Patent number 7,250,660
- Issue date Jul 31, 2007
- Altera Corporation
- Cheng-Hsiung Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for controlling on-chip termination resistance using vol...
- Patent number 7,218,155
- Issue date May 15, 2007
- Altera Corporation
- Tzung-Chin Chang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential input buffers with elevated power supplies
- Patent number 7,046,037
- Issue date May 16, 2006
- Altera Corporation
- Jeffrey Tyhach
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Differential input buffers with elevated power supplies
- Patent number 6,956,401
- Issue date Oct 18, 2005
- Altera Corporation
- Jeffrey Tyhach
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
MODULAR I/O BANK ARCHITECTURE
- Publication number 20070165478
- Publication date Jul 19, 2007
- Jeffrey Tyhach
- H03 - BASIC ELECTRONIC CIRCUITRY

Jeffrey Tyhach

Person

Patents Grantslast 30 patents

Integrated circuit floorplans

Multi-chip packages with reduced power distribution network noise

Modular I/O bank architecture

Apparatus and methods for providing highly effective and area effic...

ESD protection that supports LVDS and OCT

Techniques for controlling on-chip termination resistance using vol...

Differential input buffers with elevated power supplies

Differential input buffers with elevated power supplies

Patents Applicationslast 30 patents

MODULAR I/O BANK ARCHITECTURE