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Jeffrey V. Lindholm
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Longmont, CO, US
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Patents Grants
last 30 patents
Information
Patent Grant
Methods of implementing and modeling interconnect lines at optional...
Patent number
8,001,511
Issue date
Aug 16, 2011
Xilinx, Inc.
Trevor J. Bauer
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Methods of implementing and modeling interconnect lines at optional...
Patent number
7,451,421
Issue date
Nov 11, 2008
Xilinx, Inc.
Trevor J. Bauer
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Methods of routing programmable logic devices to minimize programmi...
Patent number
7,249,335
Issue date
Jul 24, 2007
Xilinx, Inc.
Jay T. Young
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Routing with frame awareness to minimize device programming time an...
Patent number
7,149,997
Issue date
Dec 12, 2006
Xilinx, Inc.
Jay T. Young
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Methods of routing programmable logic devices to minimize programmi...
Patent number
7,143,384
Issue date
Nov 28, 2006
Xilinx, Inc.
Jay T. Young
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
PLD device representation with factored repeatable tiles
Patent number
7,107,565
Issue date
Sep 12, 2006
Xilinx, Inc.
Jeffrey V. Lindholm
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Methods of generating test designs for testing specific routing res...
Patent number
7,058,919
Issue date
Jun 6, 2006
Xilinx, Inc.
Jay T. Young
G01 - MEASURING TESTING
Information
Patent Grant
Methods of resource optimization in programmable logic devices to r...
Patent number
6,944,809
Issue date
Sep 13, 2005
Xilinx, Inc.
Andrew W. Lai
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Partial reconfiguration of a programmable logic device using an on-...
Patent number
6,907,595
Issue date
Jun 14, 2005
Xilinx, Inc.
Derek R. Curd
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Clock template for configuring a programmable gate array
Patent number
6,732,347
Issue date
May 4, 2004
Xilinx, Inc.
Nicolas J. Camilleri
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
System and method for verifying configuration of a programmable log...
Patent number
6,553,523
Issue date
Apr 22, 2003
Jeffrey V. Lindholm
G01 - MEASURING TESTING
Information
Patent Grant
Method for compressing an FPGA bitsream
Patent number
6,493,862
Issue date
Dec 10, 2002
Xilinx Inc.
Steven P. Young
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
Partial reconfiguration of a programmable logic device using an on-...
Publication number
20040113655
Publication date
Jun 17, 2004
Xilinx, Inc.
Derek R. Curd
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Methods of resource optimization in programmable logic devices to r...
Publication number
20040030975
Publication date
Feb 12, 2004
Xilinx, Inc.
Andrew W. Lai
G06 - COMPUTING CALCULATING COUNTING