Jehoda Refaeli

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data processing system with tag-based queue management
- Patent number 12,072,757
- Issue date Aug 27, 2024
- NXP B.V.
- Ankush Sethi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and methods for preventing errors and detecting faults with...
- Patent number 11,769,567
- Issue date Sep 26, 2023
- NXP USA, INC.
- Jehoda Refaeli
- G11 - INFORMATION STORAGE
Information Patent Grant
Safe-stating a system interconnect within a data processing system
- Patent number 11,645,155
- Issue date May 9, 2023
- NXP B.V.
- Arjun Pal Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for fault collection and reaction in system-on-chip
- Patent number 11,334,409
- Issue date May 17, 2022
- NXP USA, INC.
- Hemant Nautiyal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry for checking operation of error correction code (ECC) cir...
- Patent number 11,069,421
- Issue date Jul 20, 2021
- NXP USA, INC.
- Jehoda Refaeli
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for interrupt distribution
- Patent number 10,838,760
- Issue date Nov 17, 2020
- NXP USA, INC.
- Jeffrey Freeman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having lockstep operation
- Patent number 10,802,932
- Issue date Oct 13, 2020
- NXP USA, INC.
- Jehoda Refaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing system having dynamic thread control
- Patent number 10,445,133
- Issue date Oct 15, 2019
- NXP USA, INC.
- Jonathan J. Gamoneda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Comparator and clock signal generation circuit
- Patent number 8,975,926
- Issue date Mar 10, 2015
- FREESCALE SEMICONDUCTOR, INC.
- Wenzhong Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for soft error detection in memory devices
- Patent number 8,717,829
- Issue date May 6, 2014
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface system and method with backward compatibility
- Patent number 8,615,610
- Issue date Dec 24, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Gary L. Miller
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Device and technique for transistor well biasing
- Patent number 8,164,378
- Issue date Apr 24, 2012
- FREESCALE SEMICONDUCTOR, INC.
- Stefano Pietri
- G05 - CONTROLLING REGULATING
Information Patent Grant
Error detector in a cache memory using configurable way redundancy
- Patent number 7,809,980
- Issue date Oct 5, 2010
- Jehoda Refaeli
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DATA PROCESSING SYSTEM WITH TAG-BASED QUEUE MANAGEMENT
- Publication number 20240143432
- Publication date May 2, 2024
- NXP B.V.
- Ankush SETHI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICES AND METHODS FOR PREVENTING ERRORS AND DETECTING FAULTS WITH...
- Publication number 20230015944
- Publication date Jan 19, 2023
- Jehoda Refaeli
- G11 - INFORMATION STORAGE
Information Patent Application
SAFE-STATING A SYSTEM INTERCONNECT WITHIN A DATA PROCESSING SYSTEM
- Publication number 20220269563
- Publication date Aug 25, 2022
- NXP B.V.
- Arjun Pal Chowdhury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR FAULT COLLECTION AND REACTION IN SYSTEM-ON-CHIP
- Publication number 20210397502
- Publication date Dec 23, 2021
- NXP USA, Inc.
- Hemant Nautiyal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PROCESSING SYSTEM HAVING LOCKSTEP OPERATION
- Publication number 20190171536
- Publication date Jun 6, 2019
- NXP USA, Inc.
- JEHODA REFAELI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR INTERRUPT DISTRIBUTION
- Publication number 20190163519
- Publication date May 30, 2019
- NXP USA, Inc.
- Jeffrey FREEMAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR TRANSMITTING MESSAGES IN A CONTROLLER AREA...
- Publication number 20180227145
- Publication date Aug 9, 2018
- NXP USA, Inc.
- Antonio Mauricio Brochi
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DATA PROCESSING SYSTEM HAVING DYNAMIC THREAD CONTROL
- Publication number 20170255485
- Publication date Sep 7, 2017
- Freescale Semiconductor Inc.
- Jonathan J. Gamoneda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPARATOR AND CLOCK SIGNAL GENERATION CIRCUIT
- Publication number 20140300400
- Publication date Oct 9, 2014
- Wenzhong Zhang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SYSTEM AND METHOD FOR SOFT ERROR DETECTION IN MEMORY DEVICES
- Publication number 20130343133
- Publication date Dec 26, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Ashish Sharma
- G11 - INFORMATION STORAGE
Information Patent Application
INTERFACE SYSTEM AND METHOD WITH BACKWARD COMPATIBILITY
- Publication number 20130086283
- Publication date Apr 4, 2013
- FREESCALE SEMICONDUCTOR, INC.
- Gary L. Miller
- G01 - MEASURING TESTING
Information Patent Application
DEVICE AND TECHNIQUE FOR TRANSISTOR WELL BIASING
- Publication number 20090278571
- Publication date Nov 12, 2009
- FREESCALE SEMICONDUCTOR, INC.
- Stefano Pietri
- G05 - CONTROLLING REGULATING

Jehoda Refaeli

Person

Patents Grantslast 30 patents

Data processing system with tag-based queue management

Devices and methods for preventing errors and detecting faults with...

Safe-stating a system interconnect within a data processing system

Method and system for fault collection and reaction in system-on-chip

Circuitry for checking operation of error correction code (ECC) cir...

Systems and methods for interrupt distribution

Data processing system having lockstep operation

Data processing system having dynamic thread control

Comparator and clock signal generation circuit

System and method for soft error detection in memory devices

Interface system and method with backward compatibility

Device and technique for transistor well biasing

Error detector in a cache memory using configurable way redundancy

Patents Applicationslast 30 patents

DATA PROCESSING SYSTEM WITH TAG-BASED QUEUE MANAGEMENT

DEVICES AND METHODS FOR PREVENTING ERRORS AND DETECTING FAULTS WITH...

SAFE-STATING A SYSTEM INTERCONNECT WITHIN A DATA PROCESSING SYSTEM

METHOD AND SYSTEM FOR FAULT COLLECTION AND REACTION IN SYSTEM-ON-CHIP

DATA PROCESSING SYSTEM HAVING LOCKSTEP OPERATION

SYSTEMS AND METHODS FOR INTERRUPT DISTRIBUTION

SYSTEMS AND METHODS FOR TRANSMITTING MESSAGES IN A CONTROLLER AREA...

DATA PROCESSING SYSTEM HAVING DYNAMIC THREAD CONTROL

COMPARATOR AND CLOCK SIGNAL GENERATION CIRCUIT

SYSTEM AND METHOD FOR SOFT ERROR DETECTION IN MEMORY DEVICES

INTERFACE SYSTEM AND METHOD WITH BACKWARD COMPATIBILITY

DEVICE AND TECHNIQUE FOR TRANSISTOR WELL BIASING