Jens Lupke

Person

Munchen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Test circuit for testing a synchronous memory circuit
- Patent number 7,117,404
- Issue date Oct 3, 2006
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for generating digital signal patterns
- Patent number 7,117,403
- Issue date Oct 3, 2006
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing fast synchronous digital circuits, particularly...
- Patent number 7,062,690
- Issue date Jun 13, 2006
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and device for reading and for checking the time position of...
- Patent number 6,871,306
- Issue date Mar 22, 2005
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
Address counter for addressing synchronous high-frequency digital c...
- Patent number 6,862,702
- Issue date Mar 1, 2005
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit configuration for generating control signals for testing hi...
- Patent number 6,839,397
- Issue date Jan 4, 2005
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing fast integrated digital circuits, in particular...
- Patent number 6,721,904
- Issue date Apr 13, 2004
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing fast synchronous semiconductor circuits
- Patent number 6,556,492
- Issue date Apr 29, 2003
- Infineon Technologies AG
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Grant
Component holder for testing devices and component holder system mi...
- Patent number 6,535,007
- Issue date Mar 18, 2003
- Infineon Technologies AG
- Hermann Haas
- G11 - INFORMATION STORAGE
Information Patent Grant
Field-effect-controlled transistor and method for fabricating the t...
- Patent number 6,515,319
- Issue date Feb 4, 2003
- Infineon Technologies AG
- Dietrich Widmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of testing a memory cell having a floating gate
- Patent number 6,396,752
- Issue date May 28, 2002
- Infineon Technologies AG
- Jens Lüpke
- G11 - INFORMATION STORAGE
Information Patent Grant
Burn-in test device
- Patent number 6,268,718
- Issue date Jul 31, 2001
- Siemens Aktiengesellschaft
- Jens Lüpke
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Test circuit for testing a synchronous memory circuit
- Publication number 20030005361
- Publication date Jan 2, 2003
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
Method and device for reading and for checking the time position of...
- Publication number 20020160558
- Publication date Oct 31, 2002
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
System for testing fast synchronous digital circuits, particularly...
- Publication number 20020070748
- Publication date Jun 13, 2002
- Wolfgang Ernst
- G01 - MEASURING TESTING
Information Patent Application
Field-effect-controlled transistor and method for fabricating the t...
- Publication number 20020014669
- Publication date Feb 7, 2002
- Dietrich Widmann
- B82 - NANO-TECHNOLOGY
Information Patent Application
Address counter for addressing synchronous high-frequency digital c...
- Publication number 20020012286
- Publication date Jan 31, 2002
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
System for testing fast synchronous semiconductor circuits
- Publication number 20020012283
- Publication date Jan 31, 2002
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
System for testing fast integrated digital circuits, in particular...
- Publication number 20020010877
- Publication date Jan 24, 2002
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
Method and device for generating digital signal patterns
- Publication number 20020009007
- Publication date Jan 24, 2002
- Wolfgang Ernst
- G01 - MEASURING TESTING
Information Patent Application
Circuit configuration for generating control signals for testing hi...
- Publication number 20020010878
- Publication date Jan 24, 2002
- Wolfgang Ernst
- G11 - INFORMATION STORAGE
Information Patent Application
Component holder for testing devices and component holder system mi...
- Publication number 20010048314
- Publication date Dec 6, 2001
- Infineon Technologies AG
- Hermann Haas
- G01 - MEASURING TESTING
Information Patent Application
Method of testing a memory cell having a floating gate
- Publication number 20010024392
- Publication date Sep 27, 2001
- Jens Lupke
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Test circuit for testing a synchronous memory circuit

Method and device for generating digital signal patterns

System for testing fast synchronous digital circuits, particularly...

Method and device for reading and for checking the time position of...

Address counter for addressing synchronous high-frequency digital c...

Circuit configuration for generating control signals for testing hi...

System for testing fast integrated digital circuits, in particular...

System for testing fast synchronous semiconductor circuits

Component holder for testing devices and component holder system mi...

Field-effect-controlled transistor and method for fabricating the t...

Method of testing a memory cell having a floating gate

Burn-in test device

Patents Applicationslast 30 patents

Test circuit for testing a synchronous memory circuit

Method and device for reading and for checking the time position of...

System for testing fast synchronous digital circuits, particularly...

Field-effect-controlled transistor and method for fabricating the t...

Address counter for addressing synchronous high-frequency digital c...

System for testing fast synchronous semiconductor circuits

System for testing fast integrated digital circuits, in particular...

Method and device for generating digital signal patterns

Circuit configuration for generating control signals for testing hi...

Component holder for testing devices and component holder system mi...

Method of testing a memory cell having a floating gate