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Jeremy Farrell
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Campbell, CA, US
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Patents Grants
last 30 patents
Information
Patent Grant
Fault containment and error handling in a partitioned system with s...
Patent number
7,380,001
Issue date
May 27, 2008
Fujitsu Limited
Kazunori Masuyama
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Fault containment and error handling in a partitioned system with s...
Patent number
7,315,895
Issue date
Jan 1, 2008
Fujitsu Limited
Kazunori Masuyama
Information
Patent Grant
System and method for low overhead message passing between domains...
Patent number
7,194,517
Issue date
Mar 20, 2007
Fujitsu Limited
Patrick N. Conway
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Routing mechanism for static load balancing in a partitioned comput...
Patent number
7,159,017
Issue date
Jan 2, 2007
Fujitsu Limited
Hitoshi Oi
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
System and method for partitioning a computer system into domains
Patent number
6,961,761
Issue date
Nov 1, 2005
Fujitsu Limited
Kazunori Masuyama
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Mechanism to improve performance in a multi-node computer system
Patent number
6,862,634
Issue date
Mar 1, 2005
Fujitsu Limited
Jeremy J. Farrell
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Method and system for logical partitioning of cache memory structur...
Patent number
6,754,776
Issue date
Jun 22, 2004
Fujitsu Limited
Patrick N. Conway
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Scalable and flexible method for address space decoding in a multip...
Patent number
6,742,101
Issue date
May 25, 2004
Fujitsu Limited
Sudheer Miryala
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
Information
Patent Application
System and method for low overhead message passing between domains...
Publication number
20030023666
Publication date
Jan 30, 2003
Patrick N. Conway
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Hardware mechanism to improve performance in a multi-node computer...
Publication number
20030007457
Publication date
Jan 9, 2003
Jeremy J. Farrell
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Routing mechanism for static load balancing in a partitioned comput...
Publication number
20030007493
Publication date
Jan 9, 2003
Hitoshi Oi
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Scalable and flexible method for address space decoding in a multip...
Publication number
20030005156
Publication date
Jan 2, 2003
Sudheer Miryala
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Fault containment and error handling in a partitioned system with s...
Publication number
20020186711
Publication date
Dec 12, 2002
Kazunori Masuyama
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
System and Method for partitioning a computer system into domains
Publication number
20020184345
Publication date
Dec 5, 2002
Kazunori Masuyama
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Application
Method and system for logical partitioning of cache memory structur...
Publication number
20020174301
Publication date
Nov 21, 2002
Patrick N. Conway
G06 - COMPUTING CALCULATING COUNTING