Jeremy Fowers

Person

Gainesville, FL, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semi-programmable and reconfigurable co-accelerator for a deep neur...
- Patent number 12,124,391
- Issue date Oct 22, 2024
- Microsoft Technology Licensing, LLC
- Stephen Sangho Youn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical and shared exponent floating point data types
- Patent number 11,886,833
- Issue date Jan 30, 2024
- Microsoft Technology Licensing, LLC
- Bita Darvish Rouhani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semi-programmable and reconfigurable co-accelerator for a deep neur...
- Patent number 11,734,214
- Issue date Aug 22, 2023
- Microsoft Technology Licensing, LLC
- Stephen Sangho Youn
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processing with chained instructions
- Patent number 11,663,450
- Issue date May 30, 2023
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deriving a concordant software neural network layer from a quantize...
- Patent number 11,556,764
- Issue date Jan 17, 2023
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processor based on application specific synthesis sp...
- Patent number 11,556,762
- Issue date Jan 17, 2023
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction dispatch for superscalar processors
- Patent number 11,243,778
- Issue date Feb 8, 2022
- Microsoft Technology Licensing, LLC
- Skand Hurkat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processing with the neural network model pinned to o...
- Patent number 11,157,801
- Issue date Oct 26, 2021
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processor with a window expander circuit
- Patent number 11,151,445
- Issue date Oct 19, 2021
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware node with position-dependent memories for neural network p...
- Patent number 11,144,820
- Issue date Oct 12, 2021
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-function unit for programmable hardware nodes for neural netw...
- Patent number 11,132,599
- Issue date Sep 28, 2021
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Matrix vector multiplier with a vector register file comprising a m...
- Patent number 10,795,678
- Issue date Oct 6, 2020
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data packing techniques for hard-wired multiplier circuits
- Patent number 10,467,324
- Issue date Nov 5, 2019
- Microsoft Technology Licensing, LLC
- Eric Sen Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tensor processor instruction set architecture
- Patent number 10,372,456
- Issue date Aug 6, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Halden Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tensor register files
- Patent number 10,338,925
- Issue date Jul 2, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Halden Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multifunction vector processor circuits
- Patent number 10,331,445
- Issue date Jun 25, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Halden Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware node with matrix-vector multiply tiles for neural network...
- Patent number 10,140,252
- Issue date Nov 27, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable high-bandwidth architecture for lossless compression
- Patent number 9,590,655
- Issue date Mar 7, 2017
- Microsoft Technology Licensing, LLC
- Joo-Young Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sparse matrix data structure
- Patent number 9,367,519
- Issue date Jun 14, 2016
- Microsoft Technology Licensing, LLC
- Karin Strauss
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SEMI-PROGRAMMABLE AND RECONFIGURABLE CO-ACCELERATOR FOR A DEEP NEUR...
- Publication number 20230342320
- Publication date Oct 26, 2023
- Microsoft Technology Licensing, LLC
- Stephen Sangho YOUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSING WITH CHAINED INSTRUCTIONS
- Publication number 20220391209
- Publication date Dec 8, 2022
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL AND SHARED EXPONENT FLOATING POINT DATA TYPES
- Publication number 20220253281
- Publication date Aug 11, 2022
- Microsoft Technology Licensing, LLC
- Bita DARVISH ROUHANI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEMI-PROGRAMMABLE AND RECONFIGURABLE CO-ACCELERATOR FOR A DEEP NEUR...
- Publication number 20220245083
- Publication date Aug 4, 2022
- Microsoft Technology Licensing, LLC
- Stephen Sangho YOUN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSING WITH MODEL PINNING
- Publication number 20220012577
- Publication date Jan 13, 2022
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-FUNCTION UNIT FOR PROGRAMMABLE HARDWARE NODES FOR NEURAL NETW...
- Publication number 20210406657
- Publication date Dec 30, 2021
- MICROSOFT TECHNOLOGY LICESNING, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DERIVING A CONCORDANT SOFTWARE NEURAL NETWORK LAYER FROM A QUANTIZE...
- Publication number 20200279153
- Publication date Sep 3, 2020
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSOR BASED ON APPLICATION SPECIFIC SYNTHESIS SP...
- Publication number 20190325296
- Publication date Oct 24, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSOR WITH A WINDOW EXPANDER CIRCUIT
- Publication number 20190325297
- Publication date Oct 24, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MATRIX VECTOR MULTIPLIER WITH A VECTOR REGISTER FILE COMPRISING A M...
- Publication number 20190324748
- Publication date Oct 24, 2019
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PACKING TECHNIQUES FOR HARD-WIRED MULTIPLIER CIRCUITS
- Publication number 20180341622
- Publication date Nov 29, 2018
- Microsoft Technology Licensing, LLC
- Eric Sen CHUNG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tensor Processor Instruction Set Architecture
- Publication number 20180341484
- Publication date Nov 29, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Halden FOWERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIFUNCTION VECTOR PROCESSOR CIRCUITS
- Publication number 20180341486
- Publication date Nov 29, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Halden FOWERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Tensor Register Files
- Publication number 20180341483
- Publication date Nov 29, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Halden FOWERS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE NODE WITH POSITION-DEPENDENT MEMORIES FOR NEURAL NETWORK P...
- Publication number 20180247185
- Publication date Aug 30, 2018
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSING WITH CHAINED INSTRUCTIONS
- Publication number 20180247186
- Publication date Aug 30, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NEURAL NETWORK PROCESSING WITH MODEL PINNING
- Publication number 20180247190
- Publication date Aug 30, 2018
- Microsoft Technology Licensing, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-FUNCTION UNIT FOR PROGRAMMABLE HARDWARE NODES FOR NEURAL NETW...
- Publication number 20180247187
- Publication date Aug 30, 2018
- MICROSOFT TECHNOLOGY LICESNING, LLC
- Eric S. Chung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE NODE WITH MATRIX-VECTOR MULTIPLY TILES FOR NEURAL NETWORK...
- Publication number 20180246853
- Publication date Aug 30, 2018
- Microsoft Technology Licensing, LLC
- Jeremy Fowers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scalable High-Bandwidth Architecture for Lossless Compression
- Publication number 20160285473
- Publication date Sep 29, 2016
- Microsoft Technology Licensing, LLC
- Joo-Young Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPUTATION HARDWARE WITH HIGH-BANDWIDTH MEMORY INTERFACE
- Publication number 20150067273
- Publication date Mar 5, 2015
- Microsoft Corporation
- Karin Strauss
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPARSE MATRIX DATA STRUCTURE
- Publication number 20150067009
- Publication date Mar 5, 2015
- Microsoft Corporation
- Karin Strauss
- G06 - COMPUTING CALCULATING COUNTING

Jeremy Fowers

Person

Patents Grantslast 30 patents

Semi-programmable and reconfigurable co-accelerator for a deep neur...

Hierarchical and shared exponent floating point data types

Semi-programmable and reconfigurable co-accelerator for a deep neur...

Neural network processing with chained instructions

Deriving a concordant software neural network layer from a quantize...

Neural network processor based on application specific synthesis sp...

Instruction dispatch for superscalar processors

Neural network processing with the neural network model pinned to o...

Neural network processor with a window expander circuit

Hardware node with position-dependent memories for neural network p...

Multi-function unit for programmable hardware nodes for neural netw...

Matrix vector multiplier with a vector register file comprising a m...

Data packing techniques for hard-wired multiplier circuits

Tensor processor instruction set architecture

Tensor register files

Multifunction vector processor circuits

Hardware node with matrix-vector multiply tiles for neural network...

Scalable high-bandwidth architecture for lossless compression

Sparse matrix data structure

Patents Applicationslast 30 patents

SEMI-PROGRAMMABLE AND RECONFIGURABLE CO-ACCELERATOR FOR A DEEP NEUR...

NEURAL NETWORK PROCESSING WITH CHAINED INSTRUCTIONS

HIERARCHICAL AND SHARED EXPONENT FLOATING POINT DATA TYPES

SEMI-PROGRAMMABLE AND RECONFIGURABLE CO-ACCELERATOR FOR A DEEP NEUR...

NEURAL NETWORK PROCESSING WITH MODEL PINNING

MULTI-FUNCTION UNIT FOR PROGRAMMABLE HARDWARE NODES FOR NEURAL NETW...

DERIVING A CONCORDANT SOFTWARE NEURAL NETWORK LAYER FROM A QUANTIZE...

NEURAL NETWORK PROCESSOR BASED ON APPLICATION SPECIFIC SYNTHESIS SP...

NEURAL NETWORK PROCESSOR WITH A WINDOW EXPANDER CIRCUIT

MATRIX VECTOR MULTIPLIER WITH A VECTOR REGISTER FILE COMPRISING A M...

DATA PACKING TECHNIQUES FOR HARD-WIRED MULTIPLIER CIRCUITS

Tensor Processor Instruction Set Architecture

MULTIFUNCTION VECTOR PROCESSOR CIRCUITS

Tensor Register Files

HARDWARE NODE WITH POSITION-DEPENDENT MEMORIES FOR NEURAL NETWORK P...

NEURAL NETWORK PROCESSING WITH CHAINED INSTRUCTIONS

NEURAL NETWORK PROCESSING WITH MODEL PINNING

MULTI-FUNCTION UNIT FOR PROGRAMMABLE HARDWARE NODES FOR NEURAL NETW...

HARDWARE NODE WITH MATRIX-VECTOR MULTIPLY TILES FOR NEURAL NETWORK...

Scalable High-Bandwidth Architecture for Lossless Compression

COMPUTATION HARDWARE WITH HIGH-BANDWIDTH MEMORY INTERFACE

SPARSE MATRIX DATA STRUCTURE