Jeremy Graham Harris

Person

Chalfont St Giles, GB

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for performing address translation in a comput...
- Patent number 7,356,667
- Issue date Apr 8, 2008
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for detecting the connection state of a network c...
- Patent number 7,352,289
- Issue date Apr 1, 2008
- Sun Microsystems, Inc.
- Jeremy Harris
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for generating trace data in a computing system
- Patent number 7,200,776
- Issue date Apr 3, 2007
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device drivers configured to monitor device status
- Patent number 7,137,039
- Issue date Nov 14, 2006
- Sun Microsystems, Inc.
- Paul Durrant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protection for memory modification tracking
- Patent number 6,981,172
- Issue date Dec 27, 2005
- Sun Microsystems, Inc.
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor state reintegration using bridge direct memory access con...
- Patent number 6,961,826
- Issue date Nov 1, 2005
- Sun Microsystems, Inc.
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced protection for memory modification tracking with redundant...
- Patent number 6,950,907
- Issue date Sep 27, 2005
- Sun Microsystems, Inc.
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bus bridge resource access controller
- Patent number 6,795,936
- Issue date Sep 21, 2004
- Sun Microsystems, Inc.
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor resource access control with response faking
- Patent number 6,795,939
- Issue date Sep 21, 2004
- Sun Microsystems, Inc.
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple traps after faulty access to a resource
- Patent number 6,795,937
- Issue date Sep 21, 2004
- Sun Microsystems, Inc.
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory access controller with response faking
- Patent number 6,795,938
- Issue date Sep 21, 2004
- Sun Microsystems, Inc.
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control logic for memory modification tracking with hierarchical di...
- Patent number 6,785,777
- Issue date Aug 31, 2004
- Sun Microsystems, Inc.
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory modification tracking with hierarchical dirty indi...
- Patent number 6,785,763
- Issue date Aug 31, 2004
- Sun Microsystems, Inc.
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for handling memory access requests in a data...
- Patent number 6,601,151
- Issue date Jul 29, 2003
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-thread processing
- Patent number 6,560,629
- Issue date May 6, 2003
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for handling load errors having symbolic entity generator to...
- Patent number 6,519,694
- Issue date Feb 11, 2003
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for verifying memory addresses
- Patent number 6,308,297
- Issue date Oct 23, 2001
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for branch instruction processing in a processor
- Patent number 6,260,138
- Issue date Jul 10, 2001
- Sun Microsystems, Inc.
- Jeremy G Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus for communication between multiple processing modules
- Patent number 6,038,048
- Issue date Mar 14, 2000
- Sun Microsystems, Inc.
- Jeremy G Harris
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Method and apparatus for performing address translation in a comput...
- Publication number 20050154855
- Publication date Jul 14, 2005
- Sun Microsystems, Inc.
- Jeremy G. Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System trace unit
- Publication number 20030120980
- Publication date Jun 26, 2003
- Jeremy G. Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling of load errors in computer processors
- Publication number 20030093654
- Publication date May 15, 2003
- Sun Microsystems, Inc.
- Jeremy G. Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system
- Publication number 20020138791
- Publication date Sep 26, 2002
- Paul Durrant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient memory modification tracking
- Publication number 20020065985
- Publication date May 30, 2002
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control logic for memory modification tracking
- Publication number 20020065987
- Publication date May 30, 2002
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Protection for memory modification tracking
- Publication number 20020066049
- Publication date May 30, 2002
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor state reintegration
- Publication number 20020065996
- Publication date May 30, 2002
- Paul Jeffrey Garnett
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory access control
- Publication number 20020042895
- Publication date Apr 11, 2002
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resource access control
- Publication number 20020040451
- Publication date Apr 4, 2002
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resource access control for a processor
- Publication number 20020040422
- Publication date Apr 4, 2002
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiple trap avoidance mechanism
- Publication number 20020040450
- Publication date Apr 4, 2002
- Jeremy Graham Harris
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM FOR HANDLING LOAD ERRORS HAVING SYMBOLIC ENTITY GENERATOR TO...
- Publication number 20010056530
- Publication date Dec 27, 2001
- JEREMY G. HARRIS
- G06 - COMPUTING CALCULATING COUNTING

Jeremy Graham Harris

Person

Patents Grantslast 30 patents

Method and apparatus for performing address translation in a comput...

System and method for detecting the connection state of a network c...

System and method for generating trace data in a computing system

Device drivers configured to monitor device status

Protection for memory modification tracking

Processor state reintegration using bridge direct memory access con...

Enhanced protection for memory modification tracking with redundant...

Bus bridge resource access controller

Processor resource access control with response faking

Multiple traps after faulty access to a resource

Memory access controller with response faking

Control logic for memory modification tracking with hierarchical di...

Efficient memory modification tracking with hierarchical dirty indi...

Apparatus and method for handling memory access requests in a data...

Multi-thread processing

System for handling load errors having symbolic entity generator to...

Method and apparatus for verifying memory addresses

Method and apparatus for branch instruction processing in a processor

Apparatus for communication between multiple processing modules

Patents Applicationslast 30 patents

Method and apparatus for performing address translation in a comput...

System trace unit

Handling of load errors in computer processors

Computer system

Efficient memory modification tracking

Control logic for memory modification tracking

Protection for memory modification tracking

Processor state reintegration

Memory access control

Resource access control

Resource access control for a processor

Multiple trap avoidance mechanism

SYSTEM FOR HANDLING LOAD ERRORS HAVING SYMBOLIC ENTITY GENERATOR TO...