Jeremy P. Schreiber

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and circuitry for debugging a power-gated circuit
- Patent number 8,595,563
- Issue date Nov 26, 2013
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G01 - MEASURING TESTING
Information Patent Grant
Power-gated retention flops
- Patent number 8,381,163
- Issue date Feb 19, 2013
- Advanced Micro Devices, Inc.
- Jeremy P. Schreiber
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for providing timing information while designi...
- Patent number 8,321,830
- Issue date Nov 27, 2012
- Advanced Micro Devices, Inc.
- Pete J. Hannan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND CIRCUITRY FOR DEBUGGING A POWER-GATED CIRCUIT
- Publication number 20130024829
- Publication date Jan 24, 2013
- Advanced Micro Devices, Inc.
- Benjamin Tsien
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR PROVIDING TIMING INFORMATION WHILE DESIGNI...
- Publication number 20120159415
- Publication date Jun 21, 2012
- Advanced Micro Devices, Inc.
- Pete J. Hannan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER-GATED RETENTION FLOPS
- Publication number 20120131526
- Publication date May 24, 2012
- Jeremy P. Schreiber
- H03 - BASIC ELECTRONIC CIRCUITRY