Jerome F. Duluk Jr.

Person

Santa Clara County, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fault buffer for tracking page faults in unified virtual memory system
- Patent number 11,741,015
- Issue date Aug 29, 2023
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for configuring a processor to function as multiple, sep...
- Patent number 11,663,036
- Issue date May 30, 2023
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for configuring a processor to function as multiple, sep...
- Patent number 11,635,986
- Issue date Apr 25, 2023
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for reconfiguring partitions in a parallel processing sy...
- Patent number 11,579,925
- Issue date Feb 14, 2023
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault buffer for tracking page faults in unified virtual memory system
- Patent number 11,487,673
- Issue date Nov 1, 2022
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic partitioning of execution resources
- Patent number 11,307,903
- Issue date Apr 19, 2022
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for configuring a processor to function as multiple, sep...
- Patent number 11,249,905
- Issue date Feb 15, 2022
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCIe traffic tracking hardware in a unified virtual memory system
- Patent number 11,210,253
- Issue date Dec 28, 2021
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique for computational nested parallelism
- Patent number 10,915,364
- Issue date Feb 9, 2021
- NVIDIA Corporation
- Stephen Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic partitioning of execution resources
- Patent number 10,817,338
- Issue date Oct 27, 2020
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compute task state encapsulation
- Patent number 10,795,722
- Issue date Oct 6, 2020
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fault buffer for resolving page faults in unified virtual memory sy...
- Patent number 10,445,243
- Issue date Oct 15, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-pass cache tile processing for visibility testing in a tile-bas...
- Patent number 10,438,314
- Issue date Oct 8, 2019
- NVIDIA Corporation
- Ziyad S. Hakura
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microcontroller for memory management unit
- Patent number 10,409,730
- Issue date Sep 10, 2019
- NVIDIA Corporation
- Cameron Buschardt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
PCIe traffic tracking hardware in a unified virtual memory system
- Patent number 10,331,603
- Issue date Jun 25, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory virtualization in multi-threaded processing units
- Patent number 10,310,973
- Issue date Jun 4, 2019
- NVIDIA Corporation
- Nick Barrow-Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Migration scheme for unified virtual memory system
- Patent number 10,303,616
- Issue date May 28, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing event count reports in a tile-based architecture
- Patent number 10,223,122
- Issue date Mar 5, 2019
- NVIDIA Corporation
- Ziyad S. Hakura
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
System, method, and computer program product for simultaneous execu...
- Patent number 10,217,183
- Issue date Feb 26, 2019
- NVIDIA Corporation
- Gregory S. Palmer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Migration of peer-mapped memory pages
- Patent number 10,216,413
- Issue date Feb 26, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware for parallel command list generation
- Patent number 10,169,072
- Issue date Jan 1, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory virtualization in multi-threaded processing units
- Patent number 10,169,091
- Issue date Jan 1, 2019
- NVIDIA Corporation
- Nick Barrow-Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Opportunistic migration of memory pages in a unified virtual memory...
- Patent number 10,133,677
- Issue date Nov 20, 2018
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for supporting for demand paging
- Patent number 10,114,758
- Issue date Oct 30, 2018
- NVIDIA Corporation
- Samuel H. Duncan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, method, and computer program product for executing processe...
- Patent number 10,078,911
- Issue date Sep 18, 2018
- NVIDIA Corporation
- Ziyad Sami Hakura
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Frame buffer access tracking via a sliding window in a unified virt...
- Patent number 10,061,526
- Issue date Aug 28, 2018
- NVIDIA Corporation
- John Mashey
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient memory virtualization in multi-threaded processing units
- Patent number 10,037,228
- Issue date Jul 31, 2018
- NVIDIA Corporation
- Nick Barrow-Williams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Common pointers in unified virtual memory system
- Patent number 10,031,856
- Issue date Jul 24, 2018
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checking in out-of-order task scheduling
- Patent number 9,965,321
- Issue date May 8, 2018
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling post-Z coverage data in raster operations
- Patent number 9,953,455
- Issue date Apr 24, 2018
- NVIDIA Corporation
- Eric B. Lum
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20230409486
- Publication date Dec 21, 2023
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cooperative Group Arrays
- Publication number 20230289215
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Greg PALMER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtualizing Hardware Processing Resources in a Processor
- Publication number 20230288471
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Jerome F. DULUK
- G01 - MEASURING TESTING
Information Patent Application
Distributed Shared Memory
- Publication number 20230289189
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Prakash BANGALORE PRABHAKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flexible Migration of Executing Software Between Processing Compone...
- Publication number 20230289212
- Publication date Sep 14, 2023
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20220405211
- Publication date Dec 22, 2022
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR COMPUTATIONAL NESTED PARALLELISM
- Publication number 20210349763
- Publication date Nov 11, 2021
- NVIDIA Corporation
- Stephen Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR MEMORY ERROR ISOLATION
- Publication number 20210294707
- Publication date Sep 23, 2021
- NVIDIA Corporation
- Jonathon Stuart Ramsay Evans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...
- Publication number 20210157651
- Publication date May 27, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...
- Publication number 20210073042
- Publication date Mar 11, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...
- Publication number 20210073125
- Publication date Mar 11, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...
- Publication number 20210073035
- Publication date Mar 11, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...
- Publication number 20210073025
- Publication date Mar 11, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE TASK STATE ENCAPSULATION
- Publication number 20210019185
- Publication date Jan 21, 2021
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE FOR COMPUTATIONAL NESTED PARALLELISM
- Publication number 20200151016
- Publication date May 14, 2020
- NVIDIA Corporation
- Stephen Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20190340145
- Publication date Nov 7, 2019
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-PASS CACHE TILE PROCESSING FOR VISIBILITY TESTING IN A TILE-BAS...
- Publication number 20190243652
- Publication date Aug 8, 2019
- NVIDIA Corporation
- Ziyad S. HAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PARTITIONING OF EXECUTION RESOURCES
- Publication number 20190235924
- Publication date Aug 1, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC PARTITIONING OF EXECUTION RESOURCES
- Publication number 20190235928
- Publication date Aug 1, 2019
- NVIDIA Corporation
- Jerome F. Duluk
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO-PASS CACHE TILE PROCESSING FOR VISIBILITY TESTING IN A TILE-BAS...
- Publication number 20180307490
- Publication date Oct 25, 2018
- NVIDIA Corporation
- Ziyad S. HAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20180232332
- Publication date Aug 16, 2018
- NVIDA CORPORATION
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROCONTROLLER FOR MEMORY MANAGEMENT UNIT
- Publication number 20170371802
- Publication date Dec 28, 2017
- NVIDIA Corporation
- Cameron BUSCHARDT
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20170371822
- Publication date Dec 28, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT BUFFER FOR RESOLVING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SY...
- Publication number 20170329717
- Publication date Nov 16, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20170286198
- Publication date Oct 5, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMON POINTERS IN UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20170249254
- Publication date Aug 31, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIGRATION OF PEER-MAPPED MEMORY PAGES
- Publication number 20170235491
- Publication date Aug 17, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING EVENT COUNT REPORTS IN A TILE-BASED ARCHITECTURE
- Publication number 20170213313
- Publication date Jul 27, 2017
- NVIDIA Corporation
- Ziyad S. HAKURA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FRAME BUFFER ACCESS TRACKING VIA A SLIDING WINDOW IN A UNIFIED VIRT...
- Publication number 20170199689
- Publication date Jul 13, 2017
- NVIDIA Corporation
- John MASHEY
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIGRATION SCHEME FOR UNIFIED VIRTUAL MEMORY SYSTEM
- Publication number 20170185526
- Publication date Jun 29, 2017
- NVIDIA Corporation
- Jerome F. DULUK
- G06 - COMPUTING CALCULATING COUNTING

Jerome F. Duluk Jr.

Person

Patents Grantslast 30 patents

Fault buffer for tracking page faults in unified virtual memory system

Techniques for configuring a processor to function as multiple, sep...

Techniques for configuring a processor to function as multiple, sep...

Techniques for reconfiguring partitions in a parallel processing sy...

Fault buffer for tracking page faults in unified virtual memory system

Dynamic partitioning of execution resources

Techniques for configuring a processor to function as multiple, sep...

PCIe traffic tracking hardware in a unified virtual memory system

Technique for computational nested parallelism

Dynamic partitioning of execution resources

Compute task state encapsulation

Fault buffer for resolving page faults in unified virtual memory sy...

Two-pass cache tile processing for visibility testing in a tile-bas...

Microcontroller for memory management unit

PCIe traffic tracking hardware in a unified virtual memory system

Efficient memory virtualization in multi-threaded processing units

Migration scheme for unified virtual memory system

Managing event count reports in a tile-based architecture

System, method, and computer program product for simultaneous execu...

Migration of peer-mapped memory pages

Hardware for parallel command list generation

Efficient memory virtualization in multi-threaded processing units

Opportunistic migration of memory pages in a unified virtual memory...

Techniques for supporting for demand paging

System, method, and computer program product for executing processe...

Frame buffer access tracking via a sliding window in a unified virt...

Efficient memory virtualization in multi-threaded processing units

Common pointers in unified virtual memory system

Error checking in out-of-order task scheduling

Handling post-Z coverage data in raster operations

Patents Applicationslast 30 patents

FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM

Cooperative Group Arrays

Virtualizing Hardware Processing Resources in a Processor

Distributed Shared Memory

Flexible Migration of Executing Software Between Processing Compone...

FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM

TECHNIQUE FOR COMPUTATIONAL NESTED PARALLELISM

TECHNIQUES FOR MEMORY ERROR ISOLATION

TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...

TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...

TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...

TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...

TECHNIQUES FOR CONFIGURING A PROCESSOR TO FUNCTION AS MULTIPLE, SEP...

COMPUTE TASK STATE ENCAPSULATION

TECHNIQUE FOR COMPUTATIONAL NESTED PARALLELISM

PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM

TWO-PASS CACHE TILE PROCESSING FOR VISIBILITY TESTING IN A TILE-BAS...

DYNAMIC PARTITIONING OF EXECUTION RESOURCES

DYNAMIC PARTITIONING OF EXECUTION RESOURCES

TWO-PASS CACHE TILE PROCESSING FOR VISIBILITY TESTING IN A TILE-BAS...

PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM

MICROCONTROLLER FOR MEMORY MANAGEMENT UNIT

PCIE TRAFFIC TRACKING HARDWARE IN A UNIFIED VIRTUAL MEMORY SYSTEM

FAULT BUFFER FOR RESOLVING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SY...

FAULT BUFFER FOR TRACKING PAGE FAULTS IN UNIFIED VIRTUAL MEMORY SYSTEM

COMMON POINTERS IN UNIFIED VIRTUAL MEMORY SYSTEM

MIGRATION OF PEER-MAPPED MEMORY PAGES

MANAGING EVENT COUNT REPORTS IN A TILE-BASED ARCHITECTURE

FRAME BUFFER ACCESS TRACKING VIA A SLIDING WINDOW IN A UNIFIED VIRT...

MIGRATION SCHEME FOR UNIFIED VIRTUAL MEMORY SYSTEM