Jerry C. Kao

Person

Ann Arbor, MI, US

People

Patents Grantslast 30 patents

Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 8,289,063
- Issue date Oct 16, 2012
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock distribution network architecture with clock skew management
- Patent number 7,956,664
- Issue date Jun 7, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circular edge detector
- Patent number 7,880,507
- Issue date Feb 1, 2011
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Circular edge detector for measuring timing of data signals
- Patent number 7,759,980
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wordline-to-bitline output timing ring oscillator circuit for evalu...
- Patent number 7,760,565
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock distribution network architecture for resonant-clocked systems
- Patent number 7,719,316
- Issue date May 18, 2010
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock distribution network architecture with resonant clock gating
- Patent number 7,719,317
- Issue date May 18, 2010
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage array including a local clock buffer with programmable timing
- Patent number 7,668,037
- Issue date Feb 23, 2010
- International Business Machines Corporation
- Gary D. Carpenter
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for evaluating memory cell performance
- Patent number 7,545,690
- Issue date Jun 9, 2009
- International Business Machines Corporation
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Grant
Cascaded test circuit with inter-bitline drive devices for evaluati...
- Patent number 7,349,271
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for implementing subthreshold leakage reductio...
- Patent number 7,268,590
- Issue date Sep 11, 2007
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20110215854
- Publication date Sep 8, 2011
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CIRCULAR EDGE DETECTOR
- Publication number 20100102854
- Publication date Apr 29, 2010
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Storage Array Including a Local Clock Buffer with Programmable Timing
- Publication number 20090116312
- Publication date May 7, 2009
- Gary D. Carpenter
- G11 - INFORMATION STORAGE
Information Patent Application
Clock Distribution Network Architecture for Resonant-Clocked Systems
- Publication number 20080303552
- Publication date Dec 11, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Distribution Network Architecture with Resonant Clock Gating
- Publication number 20080303576
- Publication date Dec 11, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock Distribution Network Architecture with Clock Skew Management
- Publication number 20080150605
- Publication date Jun 26, 2008
- The Regents of the University of Michigan
- Juang-Ying Chueh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR EVALUATING MEMORY CELL PERFORMANCE
- Publication number 20080130387
- Publication date Jun 5, 2008
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Application
Circular Edge Detector
- Publication number 20080122490
- Publication date May 29, 2008
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Cascaded test circuit with inter-bitline drive devices for evaluati...
- Publication number 20070237012
- Publication date Oct 11, 2007
- Jente B. Kuang
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for implementing subthreshold leakage reductio...
- Publication number 20070139082
- Publication date Jun 21, 2007
- International Business Machines Corporation
- Jerry C. Kao
- H03 - BASIC ELECTRONIC CIRCUITRY

Jerry C. Kao

Person

Patents Grantslast 30 patents

Clock distribution network architecture with clock skew management

Clock distribution network architecture with clock skew management

Circular edge detector

Circular edge detector for measuring timing of data signals

Wordline-to-bitline output timing ring oscillator circuit for evalu...

Clock distribution network architecture for resonant-clocked systems

Clock distribution network architecture with resonant clock gating

Storage array including a local clock buffer with programmable timing

Method for evaluating memory cell performance

Cascaded test circuit with inter-bitline drive devices for evaluati...

Method and apparatus for implementing subthreshold leakage reductio...

Patents Applicationslast 30 patents

Clock Distribution Network Architecture with Clock Skew Management

CIRCULAR EDGE DETECTOR

Storage Array Including a Local Clock Buffer with Programmable Timing

Clock Distribution Network Architecture for Resonant-Clocked Systems

Clock Distribution Network Architecture with Resonant Clock Gating

Clock Distribution Network Architecture with Clock Skew Management

METHOD FOR EVALUATING MEMORY CELL PERFORMANCE

Circular Edge Detector

Cascaded test circuit with inter-bitline drive devices for evaluati...

Method and apparatus for implementing subthreshold leakage reductio...