Jerry G. Jex

Person

Forest Grove, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Transmitters providing cycle encoded signals
- Patent number 8,559,530
- Issue date Oct 15, 2013
- Intel Corporation
- Jerry G. Jex
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receivers for cycle encoded signals
- Patent number 8,149,928
- Issue date Apr 3, 2012
- Intel Corporation
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receivers for cycle encoded signals
- Patent number 7,720,159
- Issue date May 18, 2010
- Intel Corporation
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmitters providing cycle encoded signals
- Patent number 7,308,025
- Issue date Dec 11, 2007
- Intel Corporation
- Jerry G Jex
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receivers for cycle encoded signals
- Patent number 7,305,023
- Issue date Dec 4, 2007
- Intel Corporation
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Controlled frequency signals
- Patent number 7,224,739
- Issue date May 29, 2007
- Intel Corporation
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receivers for controlled frequency signals
- Patent number 7,158,594
- Issue date Jan 2, 2007
- Intel Corporation
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adaptive throughput pulse width modulation communication scheme
- Patent number 7,050,507
- Issue date May 23, 2006
- Intel Corporation
- Kersi H. Vakil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Point to point alternating current (AC) impedance compensation for...
- Patent number 6,549,031
- Issue date Apr 15, 2003
- Intel Corporation
- Jerry G. Jex
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low skew minimized clock splitter
- Patent number 6,466,074
- Issue date Oct 15, 2002
- Intel Corporation
- Kersi H. Vakil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock splitter circuit to generate synchronized clock and inverted...
- Patent number 6,384,658
- Issue date May 7, 2002
- Intel Corporation
- Jerry G. Jex
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Point-to-point phase-tolerant communication
- Patent number 5,623,644
- Issue date Apr 22, 1997
- Intel Corporation
- Keith-Michael W. Self
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully asynchronous interface with programmable metastability settli...
- Patent number 5,598,113
- Issue date Jan 28, 1997
- Intel Corporation
- Jerry Jex
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous interface between parallel processor nodes
- Patent number 5,539,739
- Issue date Jul 23, 1996
- Intel Corporation
- Charles Dike
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for minimizing verify time in a semiconductor...
- Patent number 5,506,803
- Issue date Apr 9, 1996
- Intel Corporation
- Jerry G. Jex
- G11 - INFORMATION STORAGE
Information Patent Grant
Throttling circuit for a data transfer system
- Patent number 5,434,892
- Issue date Jul 18, 1995
- Intel Corporation
- Charles E. Dike
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Protected erase voltage discharge transistor in a nonvolatile semic...
- Patent number 5,309,012
- Issue date May 3, 1994
- Intel Corporation
- Jerry G. Jex
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bias circuitry for content addressable memory cells of a floating g...
- Patent number 5,267,213
- Issue date Nov 30, 1993
- Intel Corporation
- Chih-Ta Sung
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
RECEIVERS FOR CYCLE ENCODED SIGNALS
- Publication number 20100226419
- Publication date Sep 9, 2010
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSMITTERS PROVIDING CYCLE ENCODED SIGNALS
- Publication number 20080123722
- Publication date May 29, 2008
- Jerry G. Jex
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECEIVERS FOR CYCLE ENCODED SIGNALS
- Publication number 20080101505
- Publication date May 1, 2008
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Receivers for cycle encoded signals
- Publication number 20050018779
- Publication date Jan 27, 2005
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transmitters providing cycle encoded signals
- Publication number 20050018761
- Publication date Jan 27, 2005
- Jerry G. Jex
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Receivers for controlled frequency signals
- Publication number 20040037382
- Publication date Feb 26, 2004
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Controlled frequency signals
- Publication number 20040037362
- Publication date Feb 26, 2004
- Jed D. Griffin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Adaptive throughput pulse width modulation communication scheme
- Publication number 20030200364
- Publication date Oct 23, 2003
- Intel Corporation
- Kersi H. Vakil
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW SKEW MINIMIZED CLOCK SPLITTER
- Publication number 20020140488
- Publication date Oct 3, 2002
- Kersi H. Vakil
- G06 - COMPUTING CALCULATING COUNTING

Jerry G. Jex

Person

Patents Grantslast 30 patents

Transmitters providing cycle encoded signals

Receivers for cycle encoded signals

Receivers for cycle encoded signals

Transmitters providing cycle encoded signals

Receivers for cycle encoded signals

Controlled frequency signals

Receivers for controlled frequency signals

Adaptive throughput pulse width modulation communication scheme

Point to point alternating current (AC) impedance compensation for...

Low skew minimized clock splitter

Clock splitter circuit to generate synchronized clock and inverted...

Point-to-point phase-tolerant communication

Fully asynchronous interface with programmable metastability settli...

Asynchronous interface between parallel processor nodes

Apparatus and method for minimizing verify time in a semiconductor...

Throttling circuit for a data transfer system

Protected erase voltage discharge transistor in a nonvolatile semic...

Bias circuitry for content addressable memory cells of a floating g...

Patents Applicationslast 30 patents

RECEIVERS FOR CYCLE ENCODED SIGNALS

TRANSMITTERS PROVIDING CYCLE ENCODED SIGNALS

RECEIVERS FOR CYCLE ENCODED SIGNALS

Receivers for cycle encoded signals

Transmitters providing cycle encoded signals

Receivers for controlled frequency signals

Controlled frequency signals

Adaptive throughput pulse width modulation communication scheme

LOW SKEW MINIMIZED CLOCK SPLITTER