Jerry LI

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Taichung City, TW

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Patents Grantslast 30 patents

Information Patent Grant
Pillared cavity down MIS-SiP
- Patent number 11,532,489
- Issue date Dec 20, 2022
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level chip scale package structure
- Patent number 11,114,359
- Issue date Sep 7, 2021
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pillared cavity down MIS-SIP
- Patent number 11,075,167
- Issue date Jul 27, 2021
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package and a method for forming a wafer level c...
- Patent number 10,727,174
- Issue date Jul 28, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Pillared Cavity Down MIS-SIP
- Publication number 20210305167
- Publication date Sep 30, 2021
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Pillared Cavity Down MIS-SIP
- Publication number 20200251350
- Publication date Aug 6, 2020
- Dialog Semiconductor (UK) Limited
- Ernesto Gutierrez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wafer Level Chip Scale Package Structure
- Publication number 20200091026
- Publication date Mar 19, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated Circuit Package and a method for Forming a Wafer Level C...
- Publication number 20200091051
- Publication date Mar 19, 2020
- Dialog Semiconductor (UK) Limited
- Jesus Mennen Belonio
- H01 - BASIC ELECTRIC ELEMENTS