Jerry Pirog

Person

Easton, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,929,323
- Issue date Feb 23, 2021
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-core communication acceleration using hardware queue device
- Patent number 10,445,271
- Issue date Oct 15, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for dynamically balancing task processing whil...
- Patent number 10,437,638
- Issue date Oct 8, 2019
- Intel Corporation
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technologies for a distributed hardware queue manager
- Patent number 10,216,668
- Issue date Feb 26, 2019
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic configuration of processing modules in a network communicat...
- Patent number 9,444,757
- Issue date Sep 13, 2016
- Intel Corporation
- Hakan I. Pekcan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Changing a flow identifier of a packet in a multi-thread, multi-flo...
- Patent number 8,949,582
- Issue date Feb 3, 2015
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet assembly module for multi-core, multi-thread network processors
- Patent number 8,943,507
- Issue date Jan 27, 2015
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Concurrent, coherent cache access for multiple threads in a multi-c...
- Patent number 8,935,483
- Issue date Jan 13, 2015
- LSI Corporation
- Jerry Pirog
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread synchronization in a multi-thread network communications pro...
- Patent number 8,910,171
- Issue date Dec 9, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Thread synchronization in a multi-thread, multi-flow network commun...
- Patent number 8,874,878
- Issue date Oct 28, 2014
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Exception detection and thread rescheduling in a multi-core, multi-...
- Patent number 8,537,832
- Issue date Sep 17, 2013
- LSI Corporation
- Jerry Pirog
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PROCESSING OF PACKET FRAGMENTS
- Publication number 20240334245
- Publication date Oct 3, 2024
- Intel Corporation
- John J. BROWNE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20200042479
- Publication date Feb 6, 2020
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DYNAMICALLY BALANCING TASK PROCESSING WHIL...
- Publication number 20180365053
- Publication date Dec 20, 2018
- Intel Corporation
- William G. Burroughs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER
- Publication number 20170286337
- Publication date Oct 5, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE
- Publication number 20170192921
- Publication date Jul 6, 2017
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thread Synchronization in a Multi-Thread, Multi-Flow Network Commun...
- Publication number 20130089109
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...
- Publication number 20130089098
- Publication date Apr 11, 2013
- LSI Corporation
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC CONFIGURATION OF PROCESSING MODULES IN A NETWORK COMMUNICAT...
- Publication number 20110289179
- Publication date Nov 24, 2011
- LSI CORPORATION
- Hakan I. Pekcan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXCEPTION DETECTION AND THREAD RESCHEDULING IN A MULTI-CORE, MULTI-...
- Publication number 20110225589
- Publication date Sep 15, 2011
- LSI Corporation
- Jerry Pirog
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS
- Publication number 20110222540
- Publication date Sep 15, 2011
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...
- Publication number 20110222552
- Publication date Sep 15, 2011
- LSI CORPORATION
- Deepak Mital
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT, COHERENT CACHE ACCESS FOR MULTIPLE THREADS IN A MULTI-C...
- Publication number 20110225372
- Publication date Sep 15, 2011
- LSI CORPORATION
- Jerry Pirog
- G06 - COMPUTING CALCULATING COUNTING

Jerry Pirog

Person

Patents Grantslast 30 patents

Multi-core communication acceleration using hardware queue device

Multi-core communication acceleration using hardware queue device

Method and apparatus for dynamically balancing task processing whil...

Technologies for a distributed hardware queue manager

Dynamic configuration of processing modules in a network communicat...

Changing a flow identifier of a packet in a multi-thread, multi-flo...

Packet assembly module for multi-core, multi-thread network processors

Concurrent, coherent cache access for multiple threads in a multi-c...

Thread synchronization in a multi-thread network communications pro...

Thread synchronization in a multi-thread, multi-flow network commun...

Exception detection and thread rescheduling in a multi-core, multi-...

Patents Applicationslast 30 patents

PROCESSING OF PACKET FRAGMENTS

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

METHOD AND APPARATUS FOR DYNAMICALLY BALANCING TASK PROCESSING WHIL...

TECHNOLOGIES FOR A DISTRIBUTED HARDWARE QUEUE MANAGER

MULTI-CORE COMMUNICATION ACCELERATION USING HARDWARE QUEUE DEVICE

Thread Synchronization in a Multi-Thread, Multi-Flow Network Commun...

Changing a Flow Identifier of a Packet in a Multi-Thread, Multi-Flo...

DYNAMIC CONFIGURATION OF PROCESSING MODULES IN A NETWORK COMMUNICAT...

EXCEPTION DETECTION AND THREAD RESCHEDULING IN A MULTI-CORE, MULTI-...

PACKET ASSEMBLY MODULE FOR MULTI-CORE, MULTI-THREAD NETWORK PROCESSORS

THREAD SYNCHRONIZATION IN A MULTI-THREAD NETWORK COMMUNICATIONS PRO...

CONCURRENT, COHERENT CACHE ACCESS FOR MULTIPLE THREADS IN A MULTI-C...