Jesse Daniel Smith

Person

Rochester, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,424,389
- Issue date Aug 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Grant
Implementing enhanced performance dynamic evaluation circuit by com...
- Patent number 9,396,303
- Issue date Jul 19, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Deep sleep wakeup of multi-bank memory
- Patent number 9,251,869
- Issue date Feb 2, 2016
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Deep sleep wakeup of multi-bank memory
- Patent number 9,183,896
- Issue date Nov 10, 2015
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Grant
Method for selectable guaranteed write-through with early read supp...
- Patent number 8,488,368
- Issue date Jul 16, 2013
- International Business Machines Corporation
- Todd A Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
Assessing resources required to complete a VLSI design
- Patent number 7,971,164
- Issue date Jun 28, 2011
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementing enhanced array access time tracking with logic built i...
- Patent number 7,925,950
- Issue date Apr 12, 2011
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing enhanced SRAM stability and enhanced chip yield with c...
- Patent number 7,911,827
- Issue date Mar 22, 2011
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing enhanced LBIST testing of paths including arrays
- Patent number 7,844,869
- Issue date Nov 30, 2010
- International Business Machines Corporation
- Louis Bernard Bushard
- G01 - MEASURING TESTING
Information Patent Grant
Low power level shifting latch circuits with gated feedback for hig...
- Patent number 7,737,757
- Issue date Jun 15, 2010
- International Business Machines Corporation
- Derick Gardner Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Implementing local evaluation of domino read SRAM with enhanced SRA...
- Patent number 7,724,585
- Issue date May 25, 2010
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for improved SRAM write around with reduced read access pen...
- Patent number 7,535,776
- Issue date May 19, 2009
- International Business Machines Corporation
- Derick G. Behrends
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180004
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G01 - MEASURING TESTING
Information Patent Application
IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...
- Publication number 20160180009
- Publication date Jun 23, 2016
- International Business Machines Corporation
- Anthony G. Aipperspach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEEP SLEEP WAKEUP OF MULTI-BANK MEMORY
- Publication number 20150380065
- Publication date Dec 31, 2015
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149818
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY
- Publication number 20140149817
- Publication date May 29, 2014
- International Business Machines Corporation
- Chad A. Adams
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Selectable Guaranteed Write-Through With Early Read Supp...
- Publication number 20120195107
- Publication date Aug 2, 2012
- International Business Machines Corporation
- Todd A. Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Enhanced Array Access Time Tracking With Logic Built i...
- Publication number 20100218055
- Publication date Aug 26, 2010
- International Business Machines Corporation
- Todd Alan Christensen
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Enhanced SRAM Stability and Enhanced Chip Yield With C...
- Publication number 20100188886
- Publication date Jul 29, 2010
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Implementing Local Evaluation of Domino Read SRAM With Enhanced SRA...
- Publication number 20100046277
- Publication date Feb 25, 2010
- International Business Machines Corporation
- Derick Gardner Behrends
- G11 - INFORMATION STORAGE
Information Patent Application
Synchronization of Locations in Real and Virtual Worlds
- Publication number 20100030804
- Publication date Feb 4, 2010
- International Business Machines Corporation
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Power Level Shifting Latch Circuits With Gated Feedback for Hig...
- Publication number 20100019824
- Publication date Jan 28, 2010
- International Business Machines Corporation
- Derick Gardner Behrends
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Assessing Resources Required to Complete a VLSI Design
- Publication number 20090259977
- Publication date Oct 15, 2009
- Derick G. Behrends
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and circuit for implementing enhanced LBIST testing of paths...
- Publication number 20090183044
- Publication date Jul 16, 2009
- Louis Bernard Bushard
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Selectable Guaranteed Write Through
- Publication number 20090122626
- Publication date May 14, 2009
- Peter T. Freiburger
- G11 - INFORMATION STORAGE

Jesse Daniel Smith

Person

Patents Grantslast 30 patents

Implementing enhanced performance dynamic evaluation circuit by com...

Implementing enhanced performance dynamic evaluation circuit by com...

Deep sleep wakeup of multi-bank memory

Deep sleep wakeup of multi-bank memory

Method for selectable guaranteed write-through with early read supp...

Assessing resources required to complete a VLSI design

Implementing enhanced array access time tracking with logic built i...

Implementing enhanced SRAM stability and enhanced chip yield with c...

Implementing enhanced LBIST testing of paths including arrays

Low power level shifting latch circuits with gated feedback for hig...

Implementing local evaluation of domino read SRAM with enhanced SRA...

Circuit for improved SRAM write around with reduced read access pen...

Patents Applicationslast 30 patents

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

IMPLEMENTING ENHANCED PERFORMANCE DYNAMIC EVALUATION CIRCUIT BY COM...

DEEP SLEEP WAKEUP OF MULTI-BANK MEMORY

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

DIAGNOSTIC TESTING FOR A DOUBLE-PUMPED MEMORY ARRAY

Method for Selectable Guaranteed Write-Through With Early Read Supp...

Implementing Enhanced Array Access Time Tracking With Logic Built i...

Implementing Enhanced SRAM Stability and Enhanced Chip Yield With C...

Implementing Local Evaluation of Domino Read SRAM With Enhanced SRA...

Synchronization of Locations in Real and Virtual Worlds

Low Power Level Shifting Latch Circuits With Gated Feedback for Hig...

Assessing Resources Required to Complete a VLSI Design

Method and circuit for implementing enhanced LBIST testing of paths...

Method and Apparatus for Selectable Guaranteed Write Through