Ji Yong PARK

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Die interconnect substrates, a semiconductor device and a method fo...
- Patent number 12,224,264
- Issue date Feb 11, 2025
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to selectively embed magnetic materials in substrate and co...
- Patent number 12,154,715
- Issue date Nov 26, 2024
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate assembly with encapsulated magnetic feature
- Patent number 11,901,115
- Issue date Feb 13, 2024
- Intel Corporation
- Kyu-Oh Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrates, a semiconductor device and a method fo...
- Patent number 11,842,981
- Issue date Dec 12, 2023
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to embed magnetic material as first layer on coreless subst...
- Patent number 11,735,537
- Issue date Aug 22, 2023
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cavity structures in integrated circuit package supports
- Patent number 11,557,489
- Issue date Jan 17, 2023
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer solution based deposition of dielectrics for advanced s...
- Patent number 11,508,636
- Issue date Nov 22, 2022
- Intel Corporation
- Andrew Brown
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to selectively embed magnetic materials in substrate and co...
- Patent number 11,450,471
- Issue date Sep 20, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Substrate assembly with encapsulated magnetic feature
- Patent number 11,443,892
- Issue date Sep 13, 2022
- Intel Corporation
- Kyu-Oh Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods to embed magnetic material as first layer on coreless subst...
- Patent number 11,417,614
- Issue date Aug 16, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Microelectronic assemblies having conductive structures with differ...
- Patent number 11,380,609
- Issue date Jul 5, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Embedding magnetic material, in a cored or coreless semiconductor p...
- Patent number 11,355,459
- Issue date Jun 7, 2022
- INTEL CORPOATION
- Kyu-Oh Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for an inductor at a first level interface
- Patent number 11,322,290
- Issue date May 3, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus with embedded fine line space in a cavity, and a method f...
- Patent number 11,272,619
- Issue date Mar 8, 2022
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Galvanic corrosion protection for semiconductor packages
- Patent number 11,217,534
- Issue date Jan 4, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrates, a semiconductor device and a method fo...
- Patent number 11,139,264
- Issue date Oct 5, 2021
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for an inductor at a second level interface
- Patent number 11,031,360
- Issue date Jun 8, 2021
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-embedded thin-film capacitors, package-integral magnetic in...
- Patent number 10,971,492
- Issue date Apr 6, 2021
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Techniques for an inductor at a second level interface
- Patent number 10,777,514
- Issue date Sep 15, 2020
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package-embedded thin-film capacitors, package-integral magnetic in...
- Patent number 10,643,994
- Issue date May 5, 2020
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die interconnect substrates, a semiconductor device and a method fo...
- Patent number 10,468,374
- Issue date Nov 5, 2019
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for forming a substrate structure for an electrical compone...
- Patent number 10,384,431
- Issue date Aug 20, 2019
- Intel Corporation
- Ji Yong Park
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Package-embedded thin-film capacitors, package-integral magnetic in...
- Patent number 10,373,951
- Issue date Aug 6, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SUBSTRATE PROCESS FLOW FOR ENABLING SUBSTRATE TO DIE HYBRID BONDING
- Publication number 20240421043
- Publication date Dec 19, 2024
- Intel Corporation
- Kristof Darmawikarta
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...
- Publication number 20240063173
- Publication date Feb 22, 2024
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO SELECTIVELY EMBED MAGNETIC MATERIALS IN SUBSTRATE AND CO...
- Publication number 20220367104
- Publication date Nov 17, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE ASSEMBLY WITH ENCAPSULATED MAGNETIC FEATURE
- Publication number 20220359115
- Publication date Nov 10, 2022
- Intel Corporation
- Kyu-Oh Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO EMBED MAGNETIC MATERIAL AS FIRST LAYER ON CORELESS SUBST...
- Publication number 20220328431
- Publication date Oct 13, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES HAVING CONDUCTIVE STRUCTURES WITH DIFFER...
- Publication number 20220278038
- Publication date Sep 1, 2022
- Intel Corporation
- Ji Yong Park
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR AN INDUCTOR AT A FIRST LEVEL INTERFACE
- Publication number 20220230800
- Publication date Jul 21, 2022
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHOD F...
- Publication number 20220183157
- Publication date Jun 9, 2022
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...
- Publication number 20210398941
- Publication date Dec 23, 2021
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AN APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHO...
- Publication number 20210307172
- Publication date Sep 30, 2021
- Intel Corporation
- Kristof Darmawikarta
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
TECHNIQUES FOR AN INDUCTOR AT A SECOND LEVEL INTERFACE
- Publication number 20200373257
- Publication date Nov 26, 2020
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GALVANIC CORROSION PROTECTION FOR SEMICONDUCTOR PACKAGES
- Publication number 20200266149
- Publication date Aug 20, 2020
- Intel Corporation
- Cheng XU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-EMBEDDED THIN-FILM CAPACITORS, PACKAGE-INTEGRAL MAGNETIC IN...
- Publication number 20200251467
- Publication date Aug 6, 2020
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CAVITY STRUCTURES IN INTEGRATED CIRCUIT PACKAGE SUPPORTS
- Publication number 20200066543
- Publication date Feb 27, 2020
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...
- Publication number 20200027856
- Publication date Jan 23, 2020
- Intel Corporation
- Rahul JAIN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-LAYER SOLUTION BASED DEPOSITION OF DIELECTRICS FOR ADVANCED S...
- Publication number 20200006180
- Publication date Jan 2, 2020
- Intel Corporation
- Andrew BROWN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBSTRATE ASSEMBLY WITH ENCAPSULATED MAGNETIC FEATURE
- Publication number 20200005994
- Publication date Jan 2, 2020
- Kyu-Oh LEE
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CHIP PACKAGE AND METHOD OF MANUFACTURING
- Publication number 20200006210
- Publication date Jan 2, 2020
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PACKAGE-EMBEDDED THIN-FILM CAPACITORS, PACKAGE-INTEGRAL MAGNETIC IN...
- Publication number 20190393217
- Publication date Dec 26, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TECHNIQUES FOR AN INDUCTOR AT A FIRST LEVEL INTERFACE
- Publication number 20190385780
- Publication date Dec 19, 2019
- Intel Corporation
- Cheng Xu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR AN INDUCTOR AT A SECOND LEVEL INTERFACE
- Publication number 20190385959
- Publication date Dec 19, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CREATING A CAVITY USING PLASMA GAS
- Publication number 20190373736
- Publication date Dec 5, 2019
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
EMBEDDING MAGNETIC MATERIAL IN A CORED OR CORELESS SEMICONDUCTOR PA...
- Publication number 20190355675
- Publication date Nov 21, 2019
- Intel Corporation
- Kyu-Oh Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MICROELECTRONIC ASSEMBLIES HAVING CONDUCTIVE STRUCTURES WITH DIFFER...
- Publication number 20190355654
- Publication date Nov 21, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO SELECTIVELY EMBED MAGNETIC MATERIALS IN SUBSTRATE AND CO...
- Publication number 20190304661
- Publication date Oct 3, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS TO EMBED MAGNETIC MATERIAL AS FIRST LAYER ON CORELESS SUBST...
- Publication number 20190304933
- Publication date Oct 3, 2019
- Intel Corporation
- Cheng Xu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDE...
- Publication number 20190206822
- Publication date Jul 4, 2019
- Intel Corporation
- Ji Yong PARK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Interconnect Substrates, a Semiconductor Device and a Method fo...
- Publication number 20180286812
- Publication date Oct 4, 2018
- Intel Corporation
- Rahul Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Methods for forming a substrate structure for an electrical compone...
- Publication number 20180281374
- Publication date Oct 4, 2018
- Intel Corporation
- Ji Yong Park
- B32 - LAYERED PRODUCTS
Information Patent Application
ADAPTIVE TCB BY DATA FEED FORWARD
- Publication number 20170154828
- Publication date Jun 1, 2017
- Intel Corporation
- Timothy A. GOSSELIN
- B23 - MACHINE TOOLS METAL-WORKING NOT OTHERWISE PROVIDED FOR

Ji Yong PARK

Person

Patents Grantslast 30 patents

Die interconnect substrates, a semiconductor device and a method fo...

Methods to selectively embed magnetic materials in substrate and co...

Substrate assembly with encapsulated magnetic feature

Die interconnect substrates, a semiconductor device and a method fo...

Methods to embed magnetic material as first layer on coreless subst...

Cavity structures in integrated circuit package supports

Multi-layer solution based deposition of dielectrics for advanced s...

Methods to selectively embed magnetic materials in substrate and co...

Substrate assembly with encapsulated magnetic feature

Methods to embed magnetic material as first layer on coreless subst...

Microelectronic assemblies having conductive structures with differ...

Embedding magnetic material, in a cored or coreless semiconductor p...

Techniques for an inductor at a first level interface

Apparatus with embedded fine line space in a cavity, and a method f...

Galvanic corrosion protection for semiconductor packages

Die interconnect substrates, a semiconductor device and a method fo...

Techniques for an inductor at a second level interface

Package-embedded thin-film capacitors, package-integral magnetic in...

Techniques for an inductor at a second level interface

Package-embedded thin-film capacitors, package-integral magnetic in...

Die interconnect substrates, a semiconductor device and a method fo...

Methods for forming a substrate structure for an electrical compone...

Package-embedded thin-film capacitors, package-integral magnetic in...

Patents Applicationslast 30 patents

SUBSTRATE PROCESS FLOW FOR ENABLING SUBSTRATE TO DIE HYBRID BONDING

DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...

METHODS TO SELECTIVELY EMBED MAGNETIC MATERIALS IN SUBSTRATE AND CO...

SUBSTRATE ASSEMBLY WITH ENCAPSULATED MAGNETIC FEATURE

METHODS TO EMBED MAGNETIC MATERIAL AS FIRST LAYER ON CORELESS SUBST...

MICROELECTRONIC ASSEMBLIES HAVING CONDUCTIVE STRUCTURES WITH DIFFER...

TECHNIQUES FOR AN INDUCTOR AT A FIRST LEVEL INTERFACE

APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHOD F...

DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...

AN APPARATUS WITH EMBEDDED FINE LINE SPACE IN A CAVITY, AND A METHO...

TECHNIQUES FOR AN INDUCTOR AT A SECOND LEVEL INTERFACE

GALVANIC CORROSION PROTECTION FOR SEMICONDUCTOR PACKAGES

PACKAGE-EMBEDDED THIN-FILM CAPACITORS, PACKAGE-INTEGRAL MAGNETIC IN...

CAVITY STRUCTURES IN INTEGRATED CIRCUIT PACKAGE SUPPORTS

DIE INTERCONNECT SUBSTRATES, A SEMICONDUCTOR DEVICE AND A METHOD FO...

MULTI-LAYER SOLUTION BASED DEPOSITION OF DIELECTRICS FOR ADVANCED S...

SUBSTRATE ASSEMBLY WITH ENCAPSULATED MAGNETIC FEATURE

CHIP PACKAGE AND METHOD OF MANUFACTURING

PACKAGE-EMBEDDED THIN-FILM CAPACITORS, PACKAGE-INTEGRAL MAGNETIC IN...

TECHNIQUES FOR AN INDUCTOR AT A FIRST LEVEL INTERFACE

TECHNIQUES FOR AN INDUCTOR AT A SECOND LEVEL INTERFACE

CREATING A CAVITY USING PLASMA GAS

EMBEDDING MAGNETIC MATERIAL IN A CORED OR CORELESS SEMICONDUCTOR PA...

MICROELECTRONIC ASSEMBLIES HAVING CONDUCTIVE STRUCTURES WITH DIFFER...

METHODS TO SELECTIVELY EMBED MAGNETIC MATERIALS IN SUBSTRATE AND CO...

METHODS TO EMBED MAGNETIC MATERIAL AS FIRST LAYER ON CORELESS SUBST...

MISSING BUMP PREVENTION FROM GALVANIC CORROSION BY COPPER BUMP SIDE...

Die Interconnect Substrates, a Semiconductor Device and a Method fo...

Methods for forming a substrate structure for an electrical compone...

ADAPTIVE TCB BY DATA FEED FORWARD