Jian Liang

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Visibility generation improvements in tile based GPU architectures
- Patent number 12,079,897
- Issue date Sep 3, 2024
- QUALCOMM Incorporated
- Kalyan Kumar Bhiravabhatla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bin filtering
- Patent number 11,600,002
- Issue date Mar 7, 2023
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for GPU context register management
- Patent number 10,748,239
- Issue date Aug 18, 2020
- QUALCOMM Incorporated
- Nigel Poole
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive memory address scanning based on surface format for graphi...
- Patent number 10,163,180
- Issue date Dec 25, 2018
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Zero pixel culling for graphics processing
- Patent number 9,959,665
- Issue date May 1, 2018
- QUALCOMM Incorporated
- Nagarjuna Duvvuru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically switching between late depth testing and conservative d...
- Patent number 9,824,458
- Issue date Nov 21, 2017
- QUALCOMM Incorporated
- Shambhoo Khandelwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory system and method using dynamically allocated dirty ma...
- Patent number 9,342,461
- Issue date May 17, 2016
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-bank cache memory
- Patent number 9,274,964
- Issue date Mar 1, 2016
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache data migration in a multicore processing system
- Patent number 9,135,172
- Issue date Sep 15, 2015
- QUALCOMM Incorporated
- Jian Liang
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Supplemental cache in a graphics processing unit, and apparatus and...
- Patent number 8,384,728
- Issue date Feb 26, 2013
- QUALCOMM Incorporated
- Guofang Jiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method of counting leading zeros and counting leading on...
- Patent number 7,584,233
- Issue date Sep 1, 2009
- QUALCOMM Incorporated
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SLICE COORDINATION
- Publication number 20240311207
- Publication date Sep 19, 2024
- QUALCOMM Incorporated
- Jian LIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACKFACE CULLING FOR GUARD BAND CLIPPING PRIMITIVES
- Publication number 20240265486
- Publication date Aug 8, 2024
- QUALCOMM Incorporated
- Tao WANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...
- Publication number 20240221279
- Publication date Jul 4, 2024
- QUALCOMM Incorporated
- Xuefeng Tang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VISIBILITY GENERATION IN TILE BASED GPU ARCHITECTURES
- Publication number 20240104684
- Publication date Mar 28, 2024
- QUALCOMM Incorporated
- Kalyan Kumar BHIRAVABHATLA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR GENERATING TILE VISIBILITY INFORMATION CON...
- Publication number 20240104683
- Publication date Mar 28, 2024
- QUALCOMM Incorporated
- Vishwanath Shashikant NIKAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...
- Publication number 20240078737
- Publication date Mar 7, 2024
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...
- Publication number 20240078735
- Publication date Mar 7, 2024
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RASTERIZATION OF COMPUTE WORKLOADS
- Publication number 20230394738
- Publication date Dec 7, 2023
- QUALCOMM Incorporated
- Yibin ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIN FILTERING
- Publication number 20210383545
- Publication date Dec 9, 2021
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR GPU CONTEXT REGISTER MANAGEMENT
- Publication number 20200279347
- Publication date Sep 3, 2020
- QUALCOMM Incorporated
- Nigel POOLE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIN RESOLVE WITH CONCURRENT RENDERING OF A NEXT BIN
- Publication number 20200273142
- Publication date Aug 27, 2020
- QUALCOMM Incorporated
- Shambhoo Khandelwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT DEPENDENCY DETECTION FOR CONCURRENT BINNING GPU WORKLOADS
- Publication number 20200027189
- Publication date Jan 23, 2020
- QUALCOMM Incorporated
- Jonnala Gadda Nagendra Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT BINNING AND RENDERING
- Publication number 20200020067
- Publication date Jan 16, 2020
- QUALCOMM Incorporated
- Jian LIANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC MEMORY BANKS
- Publication number 20180189179
- Publication date Jul 5, 2018
- QUALCOMM Incorporated
- Yun Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC LOW-RESOLUTION Z TEST SIZES
- Publication number 20170352182
- Publication date Dec 7, 2017
- QUALCOMM Incorporated
- Tao Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY SWITCHING BETWEEN LATE DEPTH TESTING AND CONSERVATIVE D...
- Publication number 20170084043
- Publication date Mar 23, 2017
- QUALCOMM Incorporated
- Shambhoo Khandelwal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ZERO PIXEL CULLING FOR GRAPHICS PROCESSING
- Publication number 20170024926
- Publication date Jan 26, 2017
- QUALCOMM Incorporated
- Nagarjuna Duvvuru
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE MEMORY ADDRESS SCANNING BASED ON SURFACE FORMAT FOR GRAPHI...
- Publication number 20160321774
- Publication date Nov 3, 2016
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID 2D/3D GRAPHICS RENDERING
- Publication number 20160292812
- Publication date Oct 6, 2016
- QUALCOMM Incorporated
- Chehui Wu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY MANAGEMENT USING DYNAMICALLY ALLOCATED DIRTY MASK SPACE
- Publication number 20140149685
- Publication date May 29, 2014
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE DATA MIGRATION IN A MULTICORE PROCESSING SYSTEM
- Publication number 20140040553
- Publication date Feb 6, 2014
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-BANK CACHE MEMORY
- Publication number 20130205091
- Publication date Aug 8, 2013
- QUALCOMM Incorporated
- Jian Liang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPLEMENTAL CACHE IN A GRAPHICS PROCESSING UNIT, AND APPARATUS AND...
- Publication number 20090073177
- Publication date Mar 19, 2009
- QUALCOMM Incorporated
- Guofang Jiao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method of counting leading zeros and counting leading on...
- Publication number 20060294175
- Publication date Dec 28, 2006
- Christopher Edward Koob
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Visibility generation improvements in tile based GPU architectures

Bin filtering

Methods and apparatus for GPU context register management

Adaptive memory address scanning based on surface format for graphi...

Zero pixel culling for graphics processing

Dynamically switching between late depth testing and conservative d...

Cache memory system and method using dynamically allocated dirty ma...

Multi-bank cache memory

Cache data migration in a multicore processing system

Supplemental cache in a graphics processing unit, and apparatus and...

System and method of counting leading zeros and counting leading on...

Patents Applicationslast 30 patents

SLICE COORDINATION

BACKFACE CULLING FOR GUARD BAND CLIPPING PRIMITIVES

SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...

VISIBILITY GENERATION IN TILE BASED GPU ARCHITECTURES

APPARATUS AND METHOD FOR GENERATING TILE VISIBILITY INFORMATION CON...

SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...

SLICED GRAPHICS PROCESSING UNIT (GPU) ARCHITECTURE IN PROCESSOR-BAS...

RASTERIZATION OF COMPUTE WORKLOADS

BIN FILTERING

METHODS AND APPARATUS FOR GPU CONTEXT REGISTER MANAGEMENT

BIN RESOLVE WITH CONCURRENT RENDERING OF A NEXT BIN

EFFICIENT DEPENDENCY DETECTION FOR CONCURRENT BINNING GPU WORKLOADS

CONCURRENT BINNING AND RENDERING

DYNAMIC MEMORY BANKS

DYNAMIC LOW-RESOLUTION Z TEST SIZES

DYNAMICALLY SWITCHING BETWEEN LATE DEPTH TESTING AND CONSERVATIVE D...

ZERO PIXEL CULLING FOR GRAPHICS PROCESSING

ADAPTIVE MEMORY ADDRESS SCANNING BASED ON SURFACE FORMAT FOR GRAPHI...

HYBRID 2D/3D GRAPHICS RENDERING

MEMORY MANAGEMENT USING DYNAMICALLY ALLOCATED DIRTY MASK SPACE

CACHE DATA MIGRATION IN A MULTICORE PROCESSING SYSTEM

MULTI-BANK CACHE MEMORY

SUPPLEMENTAL CACHE IN A GRAPHICS PROCESSING UNIT, AND APPARATUS AND...

System and method of counting leading zeros and counting leading on...