Jiani GU

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Hangzhou, CN

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Patents Grantslast 30 patents

Information Patent Grant
Method, unit and circuit for implementing Boolean logic based on co...
- Patent number 12,166,481
- Issue date Dec 10, 2024
- ZHEJIANG LAB
- Jiani Gu
- G11 - INFORMATION STORAGE
Information Patent Grant
Full adder circuit and multi-bit full adder
- Patent number 12,073,192
- Issue date Aug 27, 2024
- ZHEJIANG LAB
- Jiani Gu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communication method for multi-chip neural network algorithm based...
- Patent number 12,019,571
- Issue date Jun 25, 2024
- ZHEJIANG LAB
- Li Yan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FULL ADDER CIRCUIT AND MULTI-BIT FULL ADDER
- Publication number 20240078086
- Publication date Mar 7, 2024
- ZHEJIANG LAB
- Jiani GU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, UNIT AND CIRCUIT FOR IMPLEMENTING BOOLEAN LOGIC BASED ON CO...
- Publication number 20230223939
- Publication date Jul 13, 2023
- ZHEJIANG LAB
- Jiani GU
- G11 - INFORMATION STORAGE