Jiayong Le

Person

Sunnyvale, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method to compute timing yield and yield bottleneck using correlate...
- Patent number 12,112,108
- Issue date Oct 8, 2024
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing delay variations and transition time variations for elect...
- Patent number 11,288,426
- Issue date Mar 29, 2022
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing delay variations and transition time variations for elect...
- Patent number 10,783,301
- Issue date Sep 22, 2020
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit timing analysis
- Patent number 10,755,023
- Issue date Aug 25, 2020
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Analyzing delay variations and transition time variations for elect...
- Patent number 10,255,395
- Issue date Apr 9, 2019
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Augmented simulation method for waveform propagation in delay calcu...
- Patent number 9,424,380
- Issue date Aug 23, 2016
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical corner evaluation for complex on-chip variation model
- Patent number 8,843,864
- Issue date Sep 23, 2014
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-box location aware and dual-bitmap voltage domain aware on-chi...
- Patent number 8,713,501
- Issue date Apr 29, 2014
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical corner evaluation for complex on chip variation model
- Patent number 8,555,222
- Issue date Oct 8, 2013
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical delay and noise calculation considering cell and interc...
- Patent number 8,495,544
- Issue date Jul 23, 2013
- Synopsys, Inc.
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sensitivity-based complex statistical modeling for random on-chip v...
- Patent number 8,407,640
- Issue date Mar 26, 2013
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical delay and noise calculation considering cell and interc...
- Patent number 7,890,915
- Issue date Feb 15, 2011
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Defining statistical sensitivity for timing optimization of logic c...
- Patent number 7,487,486
- Issue date Feb 3, 2009
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD TO COMPUTE TIMING YIELD AND YIELD BOTTLENECK USING CORRELATE...
- Publication number 20250077752
- Publication date Mar 6, 2025
- Synopsys, Inc.
- Jiayong LE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to Compute Timing Yield and Yield Bottleneck using Correlate...
- Publication number 20220129611
- Publication date Apr 28, 2022
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analyzing Delay Variations and Transition Time Variations for Elect...
- Publication number 20200410151
- Publication date Dec 31, 2020
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analyzing Delay Variations and Transition Time Variations for Elect...
- Publication number 20190197212
- Publication date Jun 27, 2019
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Analyzing Delay Variations and Transition Time Variations for Elect...
- Publication number 20170262569
- Publication date Sep 14, 2017
- Synopsys, Inc.
- Duc Huynh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUGMENTED SIMULATION METHOD FOR WAVEFORM PROPAGATION IN DELAY CALCU...
- Publication number 20160070834
- Publication date Mar 10, 2016
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Statistical Corner Evaluation For Complex On-Chip Variation Model
- Publication number 20140047403
- Publication date Feb 13, 2014
- Synopsys, Inc.
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STATISTICAL CORNER EVALUATION FOR COMPLEX ON CHIP VARIATION MODEL
- Publication number 20130179851
- Publication date Jul 11, 2013
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sensitivity-based complex statistical modeling for random on-chip v...
- Publication number 20120072880
- Publication date Mar 22, 2012
- Jiayong Le
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Statistical delay and noise calculation considering cell and interc...
- Publication number 20110099531
- Publication date Apr 28, 2011
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Statistical delay and noise calculation considering cell and interc...
- Publication number 20090288050
- Publication date Nov 19, 2009
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Defining Statistical Sensitivity for Timing Optimization of Logic C...
- Publication number 20080072198
- Publication date Mar 20, 2008
- Mustafa Celik
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Method to compute timing yield and yield bottleneck using correlate...

Analyzing delay variations and transition time variations for elect...

Analyzing delay variations and transition time variations for elect...

Circuit timing analysis

Analyzing delay variations and transition time variations for elect...

Augmented simulation method for waveform propagation in delay calcu...

Statistical corner evaluation for complex on-chip variation model

Dual-box location aware and dual-bitmap voltage domain aware on-chi...

Statistical corner evaluation for complex on chip variation model

Statistical delay and noise calculation considering cell and interc...

Sensitivity-based complex statistical modeling for random on-chip v...

Statistical delay and noise calculation considering cell and interc...

Defining statistical sensitivity for timing optimization of logic c...

Patents Applicationslast 30 patents

METHOD TO COMPUTE TIMING YIELD AND YIELD BOTTLENECK USING CORRELATE...

Method to Compute Timing Yield and Yield Bottleneck using Correlate...

Analyzing Delay Variations and Transition Time Variations for Elect...

Analyzing Delay Variations and Transition Time Variations for Elect...

Analyzing Delay Variations and Transition Time Variations for Elect...

AUGMENTED SIMULATION METHOD FOR WAVEFORM PROPAGATION IN DELAY CALCU...

Statistical Corner Evaluation For Complex On-Chip Variation Model

STATISTICAL CORNER EVALUATION FOR COMPLEX ON CHIP VARIATION MODEL

Sensitivity-based complex statistical modeling for random on-chip v...

Statistical delay and noise calculation considering cell and interc...

Statistical delay and noise calculation considering cell and interc...

Defining Statistical Sensitivity for Timing Optimization of Logic C...