Jim P. Nissen

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Austin, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Level shifter with deterministic output during power-up sequence
- Patent number 10,855,261
- Issue date Dec 1, 2020
- Semiconductor Components Industries, LLC
- Jianan Yang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cascadable level shifter cell
- Patent number 7,268,588
- Issue date Sep 11, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High speed output buffer with AC-coupled level shift and DC level d...
- Patent number 7,183,817
- Issue date Feb 27, 2007
- FREESCALE SEMICONDUCTOR, INC.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fully programmable phase locked loop
- Patent number 7,135,934
- Issue date Nov 14, 2006
- Freescale, Semiconductor, Inc.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
LEVEL SHIFTER WITH DETERMINISTIC OUTPUT DURING POWER-UP SEQUENCE
- Publication number 20200136596
- Publication date Apr 30, 2020
- Semiconductor Components Industries, LLC
- Jianan YANG
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Cascadable level shifter cell
- Publication number 20070008001
- Publication date Jan 11, 2007
- Freescale Semiconductor Inc.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
High speed output buffer with AC-coupled level shift and DC level d...
- Publication number 20070001716
- Publication date Jan 4, 2007
- Freescale Semiconductor Inc.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Fully programmable phase locked loop
- Publication number 20060197608
- Publication date Sep 7, 2006
- FREESCALE SEMICONDUCTOR, INC.
- Hector Sanchez
- H03 - BASIC ELECTRONIC CIRCUITRY