Jimshed B. Mirza

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Graphics discard engine
- Patent number 12,236,529
- Issue date Feb 25, 2025
- Advanced Micro Devices, Inc.
- Christopher J. Brennan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing partial writes to compressed blocks
- Patent number 12,169,876
- Issue date Dec 17, 2024
- Advanced Micro Devices, Inc.
- Anthony H C Chan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translation lookaside buffer entry allocation system and method
- Patent number 12,105,634
- Issue date Oct 1, 2024
- ATI Technologies ULC
- Edwin Pang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data compression support for accelerated processor
- Patent number 11,935,153
- Issue date Mar 19, 2024
- Advanced Micro Devices, Inc.
- Sergey Korobkov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency dirty RAM for cache invalidation speed improvement
- Patent number 10,956,338
- Issue date Mar 23, 2021
- ATI Technologies ULC
- Leon King Nok Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable latency request arbitration
- Patent number 10,915,359
- Issue date Feb 9, 2021
- ATI Technologies ULC
- Jimshed B. Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for partial wavefront merger
- Patent number 10,877,926
- Issue date Dec 29, 2020
- Advanced Micro Devices, Inc.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Per-group prefetch status to reduce duplicate prefetch requests
- Patent number 10,664,403
- Issue date May 26, 2020
- ATI Technologies ULC
- Leon King Nok Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data driven scheduler on multiple computing cores
- Patent number 10,649,810
- Issue date May 12, 2020
- Advanced Micro Devices, Inc.
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible shader export design in multiple computing cores
- Patent number 10,606,740
- Issue date Mar 31, 2020
- Advanced Micro Devices, Inc.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware structure to track page reuse
- Patent number 10,580,110
- Issue date Mar 3, 2020
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple linked list data structure
- Patent number 10,545,887
- Issue date Jan 28, 2020
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High-speed selective cache invalidates and write-backs on GPUS
- Patent number 10,540,280
- Issue date Jan 21, 2020
- Advanced Micro Devices, Inc.
- Mark Fowler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for translation lookaside buffer with multiple...
- Patent number 10,540,290
- Issue date Jan 21, 2020
- ATI Technologies ULC
- Gabriel H Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shader writes to compressed resources
- Patent number 10,535,178
- Issue date Jan 14, 2020
- Advanced Micro Devices, Inc.
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register allocation modes in a GPU based on total, maximum concurre...
- Patent number 10,353,859
- Issue date Jul 16, 2019
- Advanced Micro Devices, Inc.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selecting a default page size in a variable page size TLB
- Patent number 10,241,925
- Issue date Mar 26, 2019
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output memory map unit and northbridge
- Patent number 10,223,280
- Issue date Mar 5, 2019
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Input/output memory map unit and northbridge
- Patent number 10,025,721
- Issue date Jul 17, 2018
- Advanced Micro Devices, Inc.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Back-off mechanism for a peripheral page request log
- Patent number 9,239,804
- Issue date Jan 19, 2016
- Advanced Micro Devices, Inc.
- Andrew Kegel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache with reload capability after power restoration
- Patent number 8,495,300
- Issue date Jul 23, 2013
- ATI Technologies ULC
- Philip Ng
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Patents Applicationslast 30 patents

Information Patent Application
LAST USE CACHE POLICY
- Publication number 20240111681
- Publication date Apr 4, 2024
- ATI Technologies ULC
- JIMSHED MIRZA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZING PARTIAL WRITES TO COMPRESSED BLOCKS
- Publication number 20230206380
- Publication date Jun 29, 2023
- ADVANCED MICRO DEVICES, INC.
- ANTHONY HC CHAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CASCADING EXECUTION OF ATOMIC OPERATIONS
- Publication number 20230205696
- Publication date Jun 29, 2023
- ADVANCED MICRO DEVICES, INC.
- JIMSHED MIRZA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GRAPHICS DISCARD ENGINE
- Publication number 20230206559
- Publication date Jun 29, 2023
- ADVANCED MICRO DEVICES, INC.
- Christopher J. Brennan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATION LOOKASIDE BUFFER ENTRY ALLOCATION SYSTEM AND METHOD
- Publication number 20230103230
- Publication date Mar 30, 2023
- Edwin Pang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA COMPRESSION SUPPORT FOR ACCELERATED PROCESSOR
- Publication number 20220207644
- Publication date Jun 30, 2022
- ATI Technologies ULC
- Sergey Korobkov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PER-GROUP PREFETCH STATUS TO REDUCE DUPLICATE PREFETCH REQUESTS
- Publication number 20200167287
- Publication date May 28, 2020
- ATI Technologies ULC
- Leon King Nok Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPRESSED MEMORY ACCESS IMPROVEMENT THROUGH COMPRESSION-AWARE PART...
- Publication number 20200167076
- Publication date May 28, 2020
- ATI Technologies ULC
- Leon King Nok Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE LATENCY REQUEST ARBITRATION
- Publication number 20200159581
- Publication date May 21, 2020
- ATI Technologies ULC
- Jimshed B. Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY DIRTY RAM FOR CACHE INVALIDATION SPEED IMPROVEMENT
- Publication number 20200159664
- Publication date May 21, 2020
- ATI Technologies ULC
- Leon King Nok Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR PARTIAL WAVEFRONT MERGER
- Publication number 20200019530
- Publication date Jan 16, 2020
- ADVANCED MICRO DEVICES, INC.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE SHADER EXPORT DESIGN IN MULTIPLE COMPUTING CORES
- Publication number 20180314528
- Publication date Nov 1, 2018
- Advanced Micro Devices, Inc.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE STRUCTURE TO TRACK PAGE REUSE
- Publication number 20180308216
- Publication date Oct 25, 2018
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE
- Publication number 20180307619
- Publication date Oct 25, 2018
- ADVANCED MICRO DEVICES, INC.
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE LINKED LIST DATA STRUCTURE
- Publication number 20180246820
- Publication date Aug 30, 2018
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTING A DEFAULT PAGE SIZE IN A VARIABLE PAGE SIZE TLB
- Publication number 20180232316
- Publication date Aug 16, 2018
- ATI Technologies ULC
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PROCESSOR WITH GENERAL PURPOSE REGISTER RESOURCE MANAGEMENT
- Publication number 20180210732
- Publication date Jul 26, 2018
- Advanced Micro Devices, Inc.
- YunPeng Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHADER WRITES TO COMPRESSED RESOURCES
- Publication number 20180182155
- Publication date Jun 28, 2018
- Advanced Micro Devices, Inc.
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH-SPEED SELECTIVE CACHE INVALIDATES AND WRITE-BACKS ON GPUS
- Publication number 20180181488
- Publication date Jun 28, 2018
- Advanced Micro Devices, Inc.
- Mark Fowler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR TRANSLATION LOOKASIDE BUFFER WITH MULTIPLE...
- Publication number 20170315927
- Publication date Nov 2, 2017
- ATI Technologies ULC
- Gabriel H. Loh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA DRIVEN SCHEDULER ON MULTIPLE COMPUTING CORES
- Publication number 20170185451
- Publication date Jun 29, 2017
- Advanced Micro Devices, Inc.
- Jimshed Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE
- Publication number 20150120978
- Publication date Apr 30, 2015
- ATI Technologies ULC
- Vydhyanathan Kalyanasundharam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACK-OFF MECHANISM FOR A PERIPHERAL PAGE REQUEST LOG
- Publication number 20150100818
- Publication date Apr 9, 2015
- ATI Technologies ULC
- Andrew Kegel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DYNAMICALLY CONTROLLING DEPTH AND POWER CO...
- Publication number 20130138897
- Publication date May 30, 2013
- ATI Technologies ULC
- Jimshed B. Mirza
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE WITH RELOAD CAPABILITY AFTER POWER RESTORATION
- Publication number 20110219190
- Publication date Sep 8, 2011
- ATI Technologies ULC
- Philip Ng
- G06 - COMPUTING CALCULATING COUNTING

Jimshed B. Mirza

Person

Patents Grantslast 30 patents

Graphics discard engine

Optimizing partial writes to compressed blocks

Translation lookaside buffer entry allocation system and method

Data compression support for accelerated processor

Low latency dirty RAM for cache invalidation speed improvement

Variable latency request arbitration

Method and system for partial wavefront merger

Per-group prefetch status to reduce duplicate prefetch requests

Data driven scheduler on multiple computing cores

Flexible shader export design in multiple computing cores

Hardware structure to track page reuse

Multiple linked list data structure

High-speed selective cache invalidates and write-backs on GPUS

Method and apparatus for translation lookaside buffer with multiple...

Shader writes to compressed resources

Register allocation modes in a GPU based on total, maximum concurre...

Selecting a default page size in a variable page size TLB

Input/output memory map unit and northbridge

Input/output memory map unit and northbridge

Back-off mechanism for a peripheral page request log

Cache with reload capability after power restoration

Patents Applicationslast 30 patents

LAST USE CACHE POLICY

OPTIMIZING PARTIAL WRITES TO COMPRESSED BLOCKS

CASCADING EXECUTION OF ATOMIC OPERATIONS

GRAPHICS DISCARD ENGINE

TRANSLATION LOOKASIDE BUFFER ENTRY ALLOCATION SYSTEM AND METHOD

DATA COMPRESSION SUPPORT FOR ACCELERATED PROCESSOR

PER-GROUP PREFETCH STATUS TO REDUCE DUPLICATE PREFETCH REQUESTS

COMPRESSED MEMORY ACCESS IMPROVEMENT THROUGH COMPRESSION-AWARE PART...

VARIABLE LATENCY REQUEST ARBITRATION

LOW LATENCY DIRTY RAM FOR CACHE INVALIDATION SPEED IMPROVEMENT

METHOD AND SYSTEM FOR PARTIAL WAVEFRONT MERGER

FLEXIBLE SHADER EXPORT DESIGN IN MULTIPLE COMPUTING CORES

HARDWARE STRUCTURE TO TRACK PAGE REUSE

INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE

MULTIPLE LINKED LIST DATA STRUCTURE

SELECTING A DEFAULT PAGE SIZE IN A VARIABLE PAGE SIZE TLB

VECTOR PROCESSOR WITH GENERAL PURPOSE REGISTER RESOURCE MANAGEMENT

SHADER WRITES TO COMPRESSED RESOURCES

HIGH-SPEED SELECTIVE CACHE INVALIDATES AND WRITE-BACKS ON GPUS

METHOD AND APPARATUS FOR TRANSLATION LOOKASIDE BUFFER WITH MULTIPLE...

DATA DRIVEN SCHEDULER ON MULTIPLE COMPUTING CORES

INPUT/OUTPUT MEMORY MAP UNIT AND NORTHBRIDGE

BACK-OFF MECHANISM FOR A PERIPHERAL PAGE REQUEST LOG

METHOD AND APPARATUS FOR DYNAMICALLY CONTROLLING DEPTH AND POWER CO...

CACHE WITH RELOAD CAPABILITY AFTER POWER RESTORATION