JIN PAN

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Microelectronic test device including a probe card having an interp...
- Patent number 10,101,367
- Issue date Oct 16, 2018
- Intel Corporation
- Jin Pan
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuit testing architecture
- Patent number 9,506,980
- Issue date Nov 29, 2016
- Intel Corporation
- Abram M. Detofsky
- G01 - MEASURING TESTING
Information Patent Grant
Integrated circuits and systems and methods for producing the same
- Patent number 8,963,135
- Issue date Feb 24, 2015
- Intel Corporation
- Dmitri E. Nikonov
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Thermal interface for multi-chip packages
- Patent number 8,891,235
- Issue date Nov 18, 2014
- Intel Corporation
- Joseph F. Walczyk
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Grant
Temperature and voltage controlled integrated circuit processes
- Patent number 7,345,495
- Issue date Mar 18, 2008
- Intel Corporation
- Daniel J. Dangelo
- G01 - MEASURING TESTING
Information Patent Grant
Embedded voltage regulator and active transient control device in p...
- Patent number 6,897,666
- Issue date May 24, 2005
- Intel Corporation
- Tim Swettlen
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for resisting probe burn using shape memory al...
- Patent number 6,577,147
- Issue date Jun 10, 2003
- Intel Corporation
- Jun Ding
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
STACKED INSTRUMENT ARCHITECTURE FOR TESTING AND VALIDATION OF ELECT...
- Publication number 20190293707
- Publication date Sep 26, 2019
- Intel Corporation
- Erkan ACAR
- G01 - MEASURING TESTING
Information Patent Application
HIGH DENSITY LOW COST WIDEBAND PRODUCTION RF TEST INSTRUMENT ARCHIT...
- Publication number 20180351662
- Publication date Dec 6, 2018
- Jin Pan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
STACKED INSTRUMENT ARCHITECTURE FOR TESTING AND VALIDATION OF ELECT...
- Publication number 20180188288
- Publication date Jul 5, 2018
- Intel Corporation
- Erkan Acar
- G01 - MEASURING TESTING
Information Patent Application
MICROELECTRONIC TEST DEVICE INCLUDING A PROBE CARD HAVING AN INTERP...
- Publication number 20160299174
- Publication date Oct 13, 2016
- Intel Corporation
- Jin Pan
- G01 - MEASURING TESTING
Information Patent Application
MAGNETIC SHIELDED INTEGRATED CIRCUIT PACKAGE
- Publication number 20150243881
- Publication date Aug 27, 2015
- Robert L. Sankman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT TESTING ARCHITECTURE
- Publication number 20140266285
- Publication date Sep 18, 2014
- Abram M. DETOFSKY
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR PRODUCING THE SAME
- Publication number 20140152383
- Publication date Jun 5, 2014
- DMITRI E. NIKONOV
- B32 - LAYERED PRODUCTS
Information Patent Application
THERMAL INTERFACE FOR MULTI-CHIP PACKAGES
- Publication number 20140002994
- Publication date Jan 2, 2014
- Joseph F. Walczyk
- F28 - HEAT EXCHANGE IN GENERAL
Information Patent Application
Temperature and voltage controlled integrated circuit processes
- Publication number 20060002161
- Publication date Jan 5, 2006
- Daniel J. Dangelo
- G01 - MEASURING TESTING
Information Patent Application
Embedded voltage regulator and active transient control device in p...
- Publication number 20040124829
- Publication date Jul 1, 2004
- Tim Swettlen
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for resisting probe burn during testing of an...
- Publication number 20030042923
- Publication date Mar 6, 2003
- Jun Ding
- G01 - MEASURING TESTING

Person

Patents Grantslast 30 patents

Microelectronic test device including a probe card having an interp...

Integrated circuit testing architecture

Integrated circuits and systems and methods for producing the same

Thermal interface for multi-chip packages

Temperature and voltage controlled integrated circuit processes

Embedded voltage regulator and active transient control device in p...

Method and apparatus for resisting probe burn using shape memory al...

Patents Applicationslast 30 patents

STACKED INSTRUMENT ARCHITECTURE FOR TESTING AND VALIDATION OF ELECT...

HIGH DENSITY LOW COST WIDEBAND PRODUCTION RF TEST INSTRUMENT ARCHIT...

STACKED INSTRUMENT ARCHITECTURE FOR TESTING AND VALIDATION OF ELECT...

MICROELECTRONIC TEST DEVICE INCLUDING A PROBE CARD HAVING AN INTERP...

MAGNETIC SHIELDED INTEGRATED CIRCUIT PACKAGE

INTEGRATED CIRCUIT TESTING ARCHITECTURE

INTEGRATED CIRCUITS AND SYSTEMS AND METHODS FOR PRODUCING THE SAME

THERMAL INTERFACE FOR MULTI-CHIP PACKAGES

Temperature and voltage controlled integrated circuit processes

Embedded voltage regulator and active transient control device in p...

Method and apparatus for resisting probe burn during testing of an...