Jing Li

Person

Madison, WI, US

People

Patents Grantslast 30 patents

Information Patent Grant
High-speed graph processor for graph searching and simultaneous fro...
- Patent number 11,604,829
- Issue date Mar 14, 2023
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Spatially programmed logic array architecture
- Patent number 10,963,302
- Issue date Mar 30, 2021
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer architecture for high-speed, graph-traversal
- Patent number 10,747,433
- Issue date Aug 18, 2020
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Associative computer providing semi-parallel architecture
- Patent number 10,503,691
- Issue date Dec 10, 2019
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High density content addressable memory
- Patent number 9,979,649
- Issue date May 22, 2018
- Wisconsin Alumin Research Foundation
- Jing Li
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Computer architecture using compute/storage tiles
- Patent number 9,779,785
- Issue date Oct 3, 2017
- Wisconsin Alumni Research Foundation
- Jing Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Nonvolatile range-checking content addressable memory
- Patent number 9,711,221
- Issue date Jul 18, 2017
- Wisconsin Alumni Research Foundation
- Jing Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller for memory with mixed cell array and method of co...
- Patent number 9,606,908
- Issue date Mar 28, 2017
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-adjusting phase change memory storage module
- Patent number 9,563,371
- Issue date Feb 7, 2017
- GLOBALFOUNDREIS INC.
- Jing Li
- G11 - INFORMATION STORAGE
Information Patent Grant
Electrical coupling of memory cell access devices to a word line
- Patent number 9,343,545
- Issue date May 17, 2016
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with mixed cell array and system including the memory
- Patent number 9,311,009
- Issue date Apr 12, 2016
- International Business Machines Corporation
- Bing Dai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Electrical coupling of memory cell access devices to a word line
- Patent number 9,299,804
- Issue date Mar 29, 2016
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with mixed cell array and system including the memory
- Patent number 9,298,383
- Issue date Mar 29, 2016
- International Business Machines Corporation
- Bing Dai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Drift mitigation for multi-bits phase change memory
- Patent number 9,269,435
- Issue date Feb 23, 2016
- GLOBALFOUNDRIES Inc.
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Adaptive reference tuning for endurance enhancement of non-volatile...
- Patent number 9,250,816
- Issue date Feb 2, 2016
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase change memory cell with large electrode contact area
- Patent number 9,166,161
- Issue date Oct 20, 2015
- GlobalFoundries U.S. 2 LLC
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of reducing system power with mixed cell memory array
- Patent number 9,146,852
- Issue date Sep 29, 2015
- International Business Machines Corporation
- Bing Dai
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Adaptive reference tuning for endurance enhancement of non-volatile...
- Patent number 9,122,404
- Issue date Sep 1, 2015
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller for memory with mixed cell array and method of co...
- Patent number 9,032,136
- Issue date May 12, 2015
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Phase change memory cell with large electrode contact area
- Patent number 8,946,073
- Issue date Feb 3, 2015
- International Business Machines Corporation
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Writing scheme for phase change material-content addressable memory
- Patent number 8,943,374
- Issue date Jan 27, 2015
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Self-aligned patterning technique for semiconductor device features
- Patent number 8,927,424
- Issue date Jan 6, 2015
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned patterning technique for semiconductor device features
- Patent number 8,927,425
- Issue date Jan 6, 2015
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Phase change memory cell with large electrode contact area
- Patent number 8,921,820
- Issue date Dec 30, 2014
- International Business Machines Corporation
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Decoding scheme for bipolar-based diode three-dimensional memory re...
- Patent number 8,902,690
- Issue date Dec 2, 2014
- International Business Machines Corporation
- Kailash Gopalakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
3D architecture for bipolar memory using bipolar access device
- Patent number 8,873,271
- Issue date Oct 28, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Drift mitigation for multi-bits phase change memory
- Patent number 8,854,872
- Issue date Oct 7, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Decoding scheme for bipolar-based diode three-dimensional memory re...
- Patent number 8,842,491
- Issue date Sep 23, 2014
- International Business Machines Corporation
- Kailash Gopalakrishnan
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-bit resistance measurement
- Patent number 8,837,198
- Issue date Sep 16, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Vertical surround gate formation compatible with CMOS integration
- Patent number 8,815,718
- Issue date Aug 26, 2014
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
TRANSFORMER-BASED SURROGATE MODEL MODULE FOR ELECTRIC CIRCUIT PERFO...
- Publication number 20240394508
- Publication date Nov 28, 2024
- International Business Machines Corporation
- Shun Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALGORITHMIC CIRCUIT DESIGN AUTOMATION
- Publication number 20240095435
- Publication date Mar 21, 2024
- International Business Machines Corporation
- Shun Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM ARCHITECTURES FOR BIG DATA PROCESSING
- Publication number 20230116967
- Publication date Apr 20, 2023
- The Trustees of the University of Pennsylvania
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Spatially Programmed Logic Array Architecture
- Publication number 20200301722
- Publication date Sep 24, 2020
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer Architecture for High-Speed, Graph-Traversal
- Publication number 20190258401
- Publication date Aug 22, 2019
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Neural Network Processor with On-Chip Convolution Kernel Storage
- Publication number 20190244080
- Publication date Aug 8, 2019
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High-Speed Graph Processor
- Publication number 20180121564
- Publication date May 3, 2018
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Associative Computer Providing Semi-Parallel Architecture
- Publication number 20180113839
- Publication date Apr 26, 2018
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Matrix Processor with Localized Memory
- Publication number 20180113840
- Publication date Apr 26, 2018
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Density Content Addressable Memory
- Publication number 20170163534
- Publication date Jun 8, 2017
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER ARCHITECTURE USING COMPUTE/STORAGE TILES
- Publication number 20160336050
- Publication date Nov 17, 2016
- Wisconsin Alumni Research Foundation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY
- Publication number 20150347054
- Publication date Dec 3, 2015
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-ADJUSTING PHASE CHANGE MEMORY STORAGE MODULE
- Publication number 20150032979
- Publication date Jan 29, 2015
- International Business Machines Corporation
- Jing Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT MITIGATION FOR MULTI-BITS PHASE CHANGE MEMORY
- Publication number 20150023094
- Publication date Jan 22, 2015
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Application
SELF-ALIGNED PATTERNING TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES
- Publication number 20150004785
- Publication date Jan 1, 2015
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED PATTERNING TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES
- Publication number 20150004800
- Publication date Jan 1, 2015
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA
- Publication number 20150001459
- Publication date Jan 1, 2015
- International Businesss Machines Corporation
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADAPTIVE REFERENCE TUNING FOR ENDURANCE ENHANCEMENT OF NON-VOLATILE...
- Publication number 20140281162
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-ALIGNED APPROACH FOR DRAIN DIFFUSION IN FIELD EFFECT TRANSISTORS
- Publication number 20140264497
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ADAPTIVE REFERENCE TUNING FOR ENDURANCE ENHANCEMENT OF NON-VOLATILE...
- Publication number 20140281294
- Publication date Sep 18, 2014
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-ALIGNED APPROACH FOR DRAIN DIFFUSION IN FIELD EFFECT TRANSISTORS
- Publication number 20140264557
- Publication date Sep 18, 2014
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL COUPLING OF MEMORY CELL ACCESS DEVICES TO A WORD LINE
- Publication number 20140252418
- Publication date Sep 11, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Application
SINGLE-MASK SPACER TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES
- Publication number 20140252556
- Publication date Sep 11, 2014
- International Business Machines Corporation
- Chung H. Lam
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRICAL COUPLING OF MEMORY CELL ACCESS DEVICES TO A WORD LINE
- Publication number 20140256100
- Publication date Sep 11, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Application
PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA
- Publication number 20140166962
- Publication date Jun 19, 2014
- International Business Machines Corporation
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA
- Publication number 20140170831
- Publication date Jun 19, 2014
- International Business Machines Corporation
- Matthew J. BrightSky
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-BIT RESISTANCE MEASUREMENT
- Publication number 20140092694
- Publication date Apr 3, 2014
- International Business Machines Corporation
- Chung H. Lam
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY
- Publication number 20140052895
- Publication date Feb 20, 2014
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CO...
- Publication number 20140052900
- Publication date Feb 20, 2014
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CO...
- Publication number 20140052894
- Publication date Feb 20, 2014
- International Business Machines Corporation
- Bing Dai
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

High-speed graph processor for graph searching and simultaneous fro...

Spatially programmed logic array architecture

Computer architecture for high-speed, graph-traversal

Associative computer providing semi-parallel architecture

High density content addressable memory

Computer architecture using compute/storage tiles

Nonvolatile range-checking content addressable memory

Memory controller for memory with mixed cell array and method of co...

Self-adjusting phase change memory storage module

Electrical coupling of memory cell access devices to a word line

Memory with mixed cell array and system including the memory

Electrical coupling of memory cell access devices to a word line

Memory with mixed cell array and system including the memory

Drift mitigation for multi-bits phase change memory

Adaptive reference tuning for endurance enhancement of non-volatile...

Phase change memory cell with large electrode contact area

Method of reducing system power with mixed cell memory array

Adaptive reference tuning for endurance enhancement of non-volatile...

Memory controller for memory with mixed cell array and method of co...

Phase change memory cell with large electrode contact area

Writing scheme for phase change material-content addressable memory

Self-aligned patterning technique for semiconductor device features

Self-aligned patterning technique for semiconductor device features

Phase change memory cell with large electrode contact area

Decoding scheme for bipolar-based diode three-dimensional memory re...

3D architecture for bipolar memory using bipolar access device

Drift mitigation for multi-bits phase change memory

Decoding scheme for bipolar-based diode three-dimensional memory re...

Multi-bit resistance measurement

Vertical surround gate formation compatible with CMOS integration

Patents Applicationslast 30 patents

TRANSFORMER-BASED SURROGATE MODEL MODULE FOR ELECTRIC CIRCUIT PERFO...

ALGORITHMIC CIRCUIT DESIGN AUTOMATION

SYSTEM ARCHITECTURES FOR BIG DATA PROCESSING

Spatially Programmed Logic Array Architecture

Computer Architecture for High-Speed, Graph-Traversal

Neural Network Processor with On-Chip Convolution Kernel Storage

High-Speed Graph Processor

Associative Computer Providing Semi-Parallel Architecture

Matrix Processor with Localized Memory

High Density Content Addressable Memory

COMPUTER ARCHITECTURE USING COMPUTE/STORAGE TILES

MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY

SELF-ADJUSTING PHASE CHANGE MEMORY STORAGE MODULE

DRIFT MITIGATION FOR MULTI-BITS PHASE CHANGE MEMORY

SELF-ALIGNED PATTERNING TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES

SELF-ALIGNED PATTERNING TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES

PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA

ADAPTIVE REFERENCE TUNING FOR ENDURANCE ENHANCEMENT OF NON-VOLATILE...

SELF-ALIGNED APPROACH FOR DRAIN DIFFUSION IN FIELD EFFECT TRANSISTORS

ADAPTIVE REFERENCE TUNING FOR ENDURANCE ENHANCEMENT OF NON-VOLATILE...

SELF-ALIGNED APPROACH FOR DRAIN DIFFUSION IN FIELD EFFECT TRANSISTORS

ELECTRICAL COUPLING OF MEMORY CELL ACCESS DEVICES TO A WORD LINE

SINGLE-MASK SPACER TECHNIQUE FOR SEMICONDUCTOR DEVICE FEATURES

ELECTRICAL COUPLING OF MEMORY CELL ACCESS DEVICES TO A WORD LINE

PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA

PHASE CHANGE MEMORY CELL WITH LARGE ELECTRODE CONTACT AREA

MULTI-BIT RESISTANCE MEASUREMENT

MEMORY WITH MIXED CELL ARRAY AND SYSTEM INCLUDING THE MEMORY

MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CO...

MEMORY CONTROLLER FOR MEMORY WITH MIXED CELL ARRAY AND METHOD OF CO...