Jingcheng Zhuang

Person

San Diego, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for maintaining local oscillator (LO) phase conti...
- Patent number 11,264,995
- Issue date Mar 1, 2022
- QUALCOMM Incorporated
- Yue Chao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus for a transmit path with frequency hopping ph...
- Patent number 10,575,279
- Issue date Feb 25, 2020
- QUALCOMM Incorporated
- Bhushan Shanti Asuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Phase frequency detector linearization using switching supply
- Patent number 10,534,025
- Issue date Jan 14, 2020
- QUALCOMM Incorporated
- Jingcheng Zhuang
- G01 - MEASURING TESTING
Information Patent Grant
Distributed differential interconnect
- Patent number 10,523,272
- Issue date Dec 31, 2019
- QUALCOMM Incorporated
- Madhukar Vallabhaneni
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Master-slave level shifter array architecture with pre-defined powe...
- Patent number 10,256,796
- Issue date Apr 9, 2019
- QUALCOMM Incorporated
- Shih-Chieh Hsin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fractional-N phase locked loop delta sigma modulator noise reductio...
- Patent number 10,177,772
- Issue date Jan 8, 2019
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System-on-a-chip clock phase management using fractional-N PLLs
- Patent number 10,116,315
- Issue date Oct 30, 2018
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL post divider phase continuity
- Patent number 9,998,129
- Issue date Jun 12, 2018
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Re-timing based clock generation and residual sideband (RSB) enhanc...
- Patent number 9,973,182
- Issue date May 15, 2018
- QUALCOMM Incorporated
- Animesh Paul
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase continuity technique for frequency synthesis
- Patent number 9,893,875
- Issue date Feb 13, 2018
- QUALCOMM Incorporated
- Marco Zanuso
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Time-to-digital conversion with latch-based ring
- Patent number 9,864,341
- Issue date Jan 9, 2018
- QUALCOMM Incorporated
- Jingcheng Zhuang
- G04 - HOROLOGY
Information Patent Grant
Unified front-end receiver interface for accommodating incoming sig...
- Patent number 9,584,184
- Issue date Feb 28, 2017
- QUALCOMM Incorporated
- Miao Li
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Glitch free bandwidth-switching scheme for an analog phase-locked l...
- Patent number 9,520,887
- Issue date Dec 13, 2016
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Band-gap current repeater
- Patent number 9,176,511
- Issue date Nov 3, 2015
- QUALCOMM Incorporated
- Nam Van Dang
- G05 - CONTROLLING REGULATING
Information Patent Grant
Systems and methods for frequency detection
- Patent number 8,970,254
- Issue date Mar 3, 2015
- QUALCOMM Incorporated
- Glenn Murphy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and devices for matching transmission line characteristics...
- Patent number 8,928,365
- Issue date Jan 6, 2015
- QUALCOMM Incorporated
- Miao Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dual mode clock/data recovery circuit
- Patent number 8,839,020
- Issue date Sep 16, 2014
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power all digital PLL architecture
- Patent number 8,830,001
- Issue date Sep 9, 2014
- Texas Instruments Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low-hysteresis high-speed differential sampler
- Patent number 8,497,723
- Issue date Jul 30, 2013
- Advanced Micro Devices, Inc.
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compensating for wander in AC coupling data interface
- Patent number 8,461,896
- Issue date Jun 11, 2013
- Advanced Micro Devices, Inc.
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Passive filter and AC coupler receiver interface
- Patent number 8,319,579
- Issue date Nov 27, 2012
- Advanced Micro Devices, Inc.
- Jingcheng Zhuang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fractional interpolative timing advance and retard control in a tra...
- Patent number 8,306,174
- Issue date Nov 6, 2012
- Texas Instruments Incorporated
- Thomas Casimir Murphy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Bandwidth reduction mechanism for polar modulation
- Patent number 8,204,107
- Issue date Jun 19, 2012
- National Semiconductor Corporation
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Binary ripple counter sampling with adjustable delays
- Patent number 8,045,662
- Issue date Oct 25, 2011
- Texas Instruments Incorporated
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for frequency pushing/pulling compensation
- Patent number 7,808,325
- Issue date Oct 5, 2010
- Texas Instruments Incorporated
- Khurram Waheed
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
PHASE FREQUENCY DETECTOR LINEARIZATION USING SWITCHING SUPPLY
- Publication number 20180356451
- Publication date Dec 13, 2018
- QUALCOMM Incorporated
- Jingcheng ZHUANG
- G01 - MEASURING TESTING
Information Patent Application
Distributed Differential Interconnect
- Publication number 20180343032
- Publication date Nov 29, 2018
- QUALCOMM Incorporated
- Madhukar Vallabhaneni
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MASTER-SLAVE LEVEL SHIFTER ARRAY ARCHITECTURE WITH PRE-DEFINED POWE...
- Publication number 20180254772
- Publication date Sep 6, 2018
- QUALCOMM Incorporated
- Shih-Chieh Hsin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RE-TIMING BASED CLOCK GENERATION AND RESIDUAL SIDEBAND (RSB) ENHANC...
- Publication number 20180076805
- Publication date Mar 15, 2018
- QUALCOMM Incorporated
- Animesh PAUL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
FRACTIONAL-N PHASE LOCKED LOOP DELTA SIGMA MODULATOR NOISE REDUCTIO...
- Publication number 20180019756
- Publication date Jan 18, 2018
- QUALCOMM Incorporated
- Jingcheng ZHUANG
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PHASE CONTINUITY TECHNIQUE FOR FREQUENCY SYNTHESIS
- Publication number 20170338940
- Publication date Nov 23, 2017
- QUALCOMM Incorporated
- Marco ZANUSO
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND APPARATUS FOR A TRANSMIT PATH WITH FREQUENCY HOPPING PH...
- Publication number 20170094641
- Publication date Mar 30, 2017
- QUALCOMM Incorporated
- Bhushan Shanti Asuri
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BAND-GAP CURRENT REPEATER
- Publication number 20150301539
- Publication date Oct 22, 2015
- QUALCOMM Incorporated
- Nam Van Dang
- G05 - CONTROLLING REGULATING
Information Patent Application
UNIFIED FRONT-END RECEIVER INTERFACE FOR ACCOMMODATING INCOMING SIG...
- Publication number 20140256276
- Publication date Sep 11, 2014
- QUALCOMM Incorporated
- Miao Li
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND DEVICES FOR MATCHING TRANSMISSION LINE CHARACTERISTICS...
- Publication number 20140111250
- Publication date Apr 24, 2014
- QUALCOMM Incorporated
- Miao Li
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA...
- Publication number 20130216003
- Publication date Aug 22, 2013
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DUAL MODE CLOCK/DATA RECOVERY CIRCUIT
- Publication number 20130191679
- Publication date Jul 25, 2013
- QUALCOMM Incorporated
- Jingcheng Zhuang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
LOW-HYSTERESIS HIGH-SPEED DIFFERENTIAL SAMPLER
- Publication number 20130127507
- Publication date May 23, 2013
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPENSATING FOR WANDER IN AC COUPLING DATA INTERFACE
- Publication number 20120133414
- Publication date May 31, 2012
- Advanced Micro Devices, Inc.
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PASSIVE FILTER AND AC COUPLER RECEIVER INTERFACE
- Publication number 20120133459
- Publication date May 31, 2012
- Jingcheng Zhuang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Fractional Interpolative Timing Advance and Retard Control in a Tra...
- Publication number 20100027729
- Publication date Feb 4, 2010
- Thomas Casimir Murphy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
System and Method for Frequency Pushing/Pulling Compensation
- Publication number 20090268791
- Publication date Oct 29, 2009
- Khurram Waheed
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BANDWIDTH REDUCTION MECHANISM FOR POLAR MODULATION
- Publication number 20090258612
- Publication date Oct 15, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low Power All Digital PLL Architecture
- Publication number 20080315959
- Publication date Dec 25, 2008
- Jingcheng Zhuang
- H03 - BASIC ELECTRONIC CIRCUITRY

Jingcheng Zhuang

Person

Patents Grantslast 30 patents

System and method for maintaining local oscillator (LO) phase conti...

Methods and apparatus for a transmit path with frequency hopping ph...

Phase frequency detector linearization using switching supply

Distributed differential interconnect

Master-slave level shifter array architecture with pre-defined powe...

Fractional-N phase locked loop delta sigma modulator noise reductio...

System-on-a-chip clock phase management using fractional-N PLLs

PLL post divider phase continuity

Re-timing based clock generation and residual sideband (RSB) enhanc...

Phase continuity technique for frequency synthesis

Time-to-digital conversion with latch-based ring

Unified front-end receiver interface for accommodating incoming sig...

Glitch free bandwidth-switching scheme for an analog phase-locked l...

Band-gap current repeater

Systems and methods for frequency detection

Methods and devices for matching transmission line characteristics...

Dual mode clock/data recovery circuit

Low power all digital PLL architecture

Low-hysteresis high-speed differential sampler

Compensating for wander in AC coupling data interface

Passive filter and AC coupler receiver interface

Fractional interpolative timing advance and retard control in a tra...

Bandwidth reduction mechanism for polar modulation

Binary ripple counter sampling with adjustable delays

System and method for frequency pushing/pulling compensation

Patents Applicationslast 30 patents

PHASE FREQUENCY DETECTOR LINEARIZATION USING SWITCHING SUPPLY

Distributed Differential Interconnect

MASTER-SLAVE LEVEL SHIFTER ARRAY ARCHITECTURE WITH PRE-DEFINED POWE...

RE-TIMING BASED CLOCK GENERATION AND RESIDUAL SIDEBAND (RSB) ENHANC...

FRACTIONAL-N PHASE LOCKED LOOP DELTA SIGMA MODULATOR NOISE REDUCTIO...

PHASE CONTINUITY TECHNIQUE FOR FREQUENCY SYNTHESIS

METHODS AND APPARATUS FOR A TRANSMIT PATH WITH FREQUENCY HOPPING PH...

BAND-GAP CURRENT REPEATER

UNIFIED FRONT-END RECEIVER INTERFACE FOR ACCOMMODATING INCOMING SIG...

METHODS AND DEVICES FOR MATCHING TRANSMISSION LINE CHARACTERISTICS...

RESETTABLE VOLTAGE CONTROLLED OSCILLATORS (VCOs) FOR CLOCK AND DATA...

DUAL MODE CLOCK/DATA RECOVERY CIRCUIT

LOW-HYSTERESIS HIGH-SPEED DIFFERENTIAL SAMPLER

COMPENSATING FOR WANDER IN AC COUPLING DATA INTERFACE

PASSIVE FILTER AND AC COUPLER RECEIVER INTERFACE

Fractional Interpolative Timing Advance and Retard Control in a Tra...

System and Method for Frequency Pushing/Pulling Compensation

BANDWIDTH REDUCTION MECHANISM FOR POLAR MODULATION

Low Power All Digital PLL Architecture