Jinping Liu

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Method for fabricating a semiconductor device having an epitaxial c...
- Patent number 8,716,076
- Issue date May 6, 2014
- GlobalFoundries Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of fabrication thereof
- Patent number 8,546,873
- Issue date Oct 1, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for reducing loading effects during film formation
- Patent number 8,415,236
- Issue date Apr 9, 2013
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Han Guan Chew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit and method of fabrication thereof
- Patent number 8,058,123
- Issue date Nov 15, 2011
- GLOBALFOUNDRIES Singapore Pte. Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor device having an epitaxial c...
- Patent number 8,012,839
- Issue date Sep 6, 2011
- Chartered Semiconductor Manufacturing, Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a nitrogenated silicon oxide layer and MOS de...
- Patent number 7,928,020
- Issue date Apr 19, 2011
- Chartered Semiconductor Manufacturing Ltd.
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
End of range (EOR) secondary defect engineering using chemical vapo...
- Patent number 7,400,018
- Issue date Jul 15, 2008
- Chartered Semiconductor Manufacturing Ltd.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Material architecture for the fabrication of low temperature transi...
- Patent number 7,169,675
- Issue date Jan 30, 2007
- Chartered Semiconductor Manufacturing, Ltd.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
End of range (EOR) secondary defect engineering using substitutiona...
- Patent number 7,109,099
- Issue date Sep 19, 2006
- Chartered Semiconductor Manufacturing Ltd.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
HYBRID NANOSTRUCTURE, A METHOD FOR FORMING THE HYBRID NANOSTRUCTURE...
- Publication number 20130115453
- Publication date May 9, 2013
- Nanyang Technological University
- Hongjin Fan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF
- Publication number 20120012940
- Publication date Jan 19, 2012
- GLOBALFOUNDRIES SINGAPORE PTE. LTD.
- Jinping LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...
- Publication number 20110281410
- Publication date Nov 17, 2011
- Chartered Semiconductor Manufacturing Ltd.
- JINPING LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR REDUCING LOADING EFFECTS DURING FILM FORMATION
- Publication number 20100167505
- Publication date Jul 1, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Han Guan CHEW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH STRESS FILM
- Publication number 20100096695
- Publication date Apr 22, 2010
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Han Guan Chew
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Implantation for shallow trench isolation (STI) formation and for s...
- Publication number 20090315115
- Publication date Dec 24, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Beichao Zhang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...
- Publication number 20090218597
- Publication date Sep 3, 2009
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF
- Publication number 20090140292
- Publication date Jun 4, 2009
- CHARTERED SEMICONDUCTOR MANUFACTURING, LTD.
- Jinping LIU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FABRICATING A NITROGENATED SILICON OXIDE LAYER AND MOS DE...
- Publication number 20090088002
- Publication date Apr 2, 2009
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING HETEROGENEO...
- Publication number 20090053864
- Publication date Feb 26, 2009
- Jinping Liu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MATERIAL ARCHITECTURE FOR THE FABRICATION OF LOW TEMPERATURE TRANSI...
- Publication number 20070117326
- Publication date May 24, 2007
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
END OF RANGE (EOR) SECONDARY DEFECT ENGINEERING USING CHEMICAL VAPO...
- Publication number 20060270168
- Publication date Nov 30, 2006
- Chartered Semiconductor Manufacturing LTD.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of manufacturing a semiconductor device with a strained channel
- Publication number 20060030094
- Publication date Feb 9, 2006
- Chartered Semiconductor Manufacturing LTD.
- King Jien Chui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Material architecture for the fabrication of low temperature transi...
- Publication number 20060006427
- Publication date Jan 12, 2006
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
End of range (EOR) secondary defect engineering using substitutiona...
- Publication number 20050085055
- Publication date Apr 21, 2005
- Chartered Semiconductor Manufacturing Ltd.
- Chung Foong Tan
- H01 - BASIC ELECTRIC ELEMENTS

Jinping Liu

Person

Patents Grantslast 30 patents

Method for fabricating a semiconductor device having an epitaxial c...

Integrated circuit and method of fabrication thereof

Methods for reducing loading effects during film formation

Integrated circuit and method of fabrication thereof

Method for fabricating a semiconductor device having an epitaxial c...

Method of fabricating a nitrogenated silicon oxide layer and MOS de...

End of range (EOR) secondary defect engineering using chemical vapo...

Material architecture for the fabrication of low temperature transi...

End of range (EOR) secondary defect engineering using substitutiona...

Patents Applicationslast 30 patents

HYBRID NANOSTRUCTURE, A METHOD FOR FORMING THE HYBRID NANOSTRUCTURE...

INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...

METHODS FOR REDUCING LOADING EFFECTS DURING FILM FORMATION

HIGH STRESS FILM

Implantation for shallow trench isolation (STI) formation and for s...

METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EPITAXIAL C...

INTEGRATED CIRCUIT AND METHOD OF FABRICATION THEREOF

METHOD OF FABRICATING A NITROGENATED SILICON OXIDE LAYER AND MOS DE...

METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE HAVING HETEROGENEO...

MATERIAL ARCHITECTURE FOR THE FABRICATION OF LOW TEMPERATURE TRANSI...

END OF RANGE (EOR) SECONDARY DEFECT ENGINEERING USING CHEMICAL VAPO...

Method of manufacturing a semiconductor device with a strained channel

Material architecture for the fabrication of low temperature transi...

End of range (EOR) secondary defect engineering using substitutiona...