Joachim Patzer

Person

Langebueck, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a semiconductor structure including silicided and...
- Patent number 9,646,838
- Issue date May 9, 2017
- GLOBALFOUNDRIES Inc.
- Dominic Thurmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Balancing asymmetric spacers
- Patent number 9,177,871
- Issue date Nov 3, 2015
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor device employing an optical plana...
- Patent number 9,177,874
- Issue date Nov 3, 2015
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits with protected resistors and methods for fabric...
- Patent number 9,111,756
- Issue date Aug 18, 2015
- GLOBALFOUNDRIES, INC.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuits including epitaxially grown strain-inducing fil...
- Patent number 9,064,961
- Issue date Jun 23, 2015
- Global Foundries Inc.
- Joanna Wasyluk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate silicidation
- Patent number 9,034,746
- Issue date May 19, 2015
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming silicon/germanium protection layer above source/...
- Patent number 9,029,919
- Issue date May 12, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a layer of silicon on a layer of silicon/germanium
- Patent number 8,969,190
- Issue date Mar 3, 2015
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate silicidation
- Patent number 8,906,794
- Issue date Dec 9, 2014
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming asymmetric spacers on various structures on inte...
- Patent number 8,889,022
- Issue date Nov 18, 2014
- GLOBALFOUNDRIES Inc.
- Hans-Peter Moll
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming a semiconductor device while preventing or reduc...
- Patent number 8,765,542
- Issue date Jul 1, 2014
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BALANCING ASYMMETRIC SPACERS
- Publication number 20150187660
- Publication date Jul 2, 2015
- GLOBALFOUNDRIES Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS WITH PROTECTED RESISTORS AND METHODS FOR FABRIC...
- Publication number 20150084183
- Publication date Mar 26, 2015
- GLOBALFOUNDRIES, Inc.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUITS INCLUDING EPITAXIALLY GROWN STRAIN-INDUCING FIL...
- Publication number 20150076560
- Publication date Mar 19, 2015
- GLOBALFOUNDRIES, Inc.
- Joanna Wasyluk
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR DEVICE EMPLOYING AN OPTICAL PLANA...
- Publication number 20150064812
- Publication date Mar 5, 2015
- GLOBALFOUNDRIES INC.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE SILICIDATION
- Publication number 20150044861
- Publication date Feb 12, 2015
- GLOBALFOUNDRIES INC.
- Joachim Patzer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING SILICIDED AND...
- Publication number 20150031179
- Publication date Jan 29, 2015
- GLOBALFOUNDRIES INC.
- Dominic Thurmer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING ASYMMETRIC SPACERS ON VARIOUS STRUCTURES ON INTE...
- Publication number 20140248778
- Publication date Sep 4, 2014
- GLOBALFOUNDRIES INC.
- Hans-Peter Moll
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SILICON/GERMANIUM PROTECTION LAYER ABOVE SOURCE/...
- Publication number 20140217480
- Publication date Aug 7, 2014
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM
- Publication number 20140057415
- Publication date Feb 27, 2014
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS

Joachim Patzer

Person

Patents Grantslast 30 patents

Method of forming a semiconductor structure including silicided and...

Balancing asymmetric spacers

Method of forming a semiconductor device employing an optical plana...

Integrated circuits with protected resistors and methods for fabric...

Integrated circuits including epitaxially grown strain-inducing fil...

Gate silicidation

Methods of forming silicon/germanium protection layer above source/...

Methods of forming a layer of silicon on a layer of silicon/germanium

Gate silicidation

Methods of forming asymmetric spacers on various structures on inte...

Methods of forming a semiconductor device while preventing or reduc...

Patents Applicationslast 30 patents

BALANCING ASYMMETRIC SPACERS

INTEGRATED CIRCUITS WITH PROTECTED RESISTORS AND METHODS FOR FABRIC...

INTEGRATED CIRCUITS INCLUDING EPITAXIALLY GROWN STRAIN-INDUCING FIL...

METHOD OF FORMING A SEMICONDUCTOR DEVICE EMPLOYING AN OPTICAL PLANA...

GATE SILICIDATION

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING SILICIDED AND...

METHODS OF FORMING ASYMMETRIC SPACERS ON VARIOUS STRUCTURES ON INTE...

METHODS OF FORMING SILICON/GERMANIUM PROTECTION LAYER ABOVE SOURCE/...

METHODS OF FORMING A LAYER OF SILICON ON A LAYER OF SILICON/GERMANIUM