Jody W. Gambles

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Post Falls, ID, US

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Patents Grantslast 30 patents

Information Patent Grant
Diagnosable structured logic array
- Patent number 7,576,562
- Issue date Aug 18, 2009
- The United States of America as represented by the United States National Aer...
- Sterling Whitaker
- G01 - MEASURING TESTING
Information Patent Grant
Radiation tolerant combinational logic cell
- Patent number 7,489,538
- Issue date Feb 10, 2009
- University of Idaho
- Gary R. Maki
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital circuits using universal logic gates
- Patent number 6,779,156
- Issue date Aug 17, 2004
- Science & Technology Corporation @ UNM
- Sterling R. Whitaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital logic optimization using selection operators
- Patent number 6,779,158
- Issue date Aug 17, 2004
- Science & Technology Corporation @ UNM
- Sterling R. Whitaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Radiation tolerant back biased CMOS VLSI
- Patent number 6,583,470
- Issue date Jun 24, 2003
- Science & Technology Corporation @ UNM
- Gary K. Maki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for and method of eliminating single event upsets in comb...
- Patent number 6,326,809
- Issue date Dec 4, 2001
- University of New Mexico
- Jody W. Gambles
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MOLECULAR DETECTOR
- Publication number 20090029353
- Publication date Jan 29, 2009
- Wusi C. Maki
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Radiation tolerant combinational logic cell
- Publication number 20070109865
- Publication date May 17, 2007
- Idaho Research Foundation, Inc.
- Gary K. Maki
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital logic optimization using selection operators
- Publication number 20030204822
- Publication date Oct 30, 2003
- Science & Technology Corporation @ UNM
- Sterling R. Whitaker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital circuits using universal logic gates
- Publication number 20030200510
- Publication date Oct 23, 2003
- Science & Technology Corporation @ UNM
- Sterling R. Whitaker
- G06 - COMPUTING CALCULATING COUNTING