Joe Ko

Person

Hsinchu, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Bar circuit for an integrated circuit
- Patent number 6,555,893
- Issue date Apr 29, 2003
- United Microelectronics Corp.
- David Cheng-Hsiung Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for forming a self-aligned silicide layer
- Patent number 6,350,677
- Issue date Feb 26, 2002
- United Microelectronics Corp.
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing capacitor
- Patent number 6,309,925
- Issue date Oct 30, 2001
- United Microelectronics Corp.
- Tz-Guei Jung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing capacitor
- Patent number 6,303,455
- Issue date Oct 16, 2001
- United Microelectronics Corp.
- Chia-Hsin Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a mixed circuit capacitor
- Patent number 6,271,082
- Issue date Aug 7, 2001
- United Microelectronics Corp.
- Chia-Hsin Hou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of stabilizing anti-reflection coating layer
- Patent number 6,225,219
- Issue date May 1, 2001
- United Microelectronics Corp.
- Kan-Yuan Lee
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method of stabilizing anti-reflection coating layer
- Patent number 6,221,761
- Issue date Apr 24, 2001
- United Microelectronics Corp.
- Kan-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming shallow trench isolation
- Patent number 6,207,535
- Issue date Mar 27, 2001
- United Microelectronics Corp.
- Kan-Yuan Lee
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating flash memory
- Patent number 6,194,271
- Issue date Feb 27, 2001
- United Semiconductor Corp.
- Chih-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating high voltage semiconductor device
- Patent number 6,180,471
- Issue date Jan 30, 2001
- United Semiconductor Corp.
- Peter Chang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating flash memory
- Patent number 6,159,803
- Issue date Dec 12, 2000
- United Microelectronics Corp.
- Gary Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for prevention of latch-up of CMOS devices
- Patent number 6,046,079
- Issue date Apr 4, 2000
- United Microelectronics Corporation
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure of a flash memory
- Patent number 6,046,938
- Issue date Apr 4, 2000
- United Semiconductor Corp.
- Gary Hong
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of fabricating an electrically erasable and programmable rea...
- Patent number 5,976,935
- Issue date Nov 2, 1999
- United Semiconductor Corp.
- Ying-Jen Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating electrostatic discharge protection device
- Patent number 5,960,288
- Issue date Sep 28, 1999
- United Semiconductor Corp.
- Gary Hong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process of forming a field effect transistor without spacer mask ed...
- Patent number 5,956,590
- Issue date Sep 21, 1999
- United Microelectronics Corp.
- Yong-Fen Hsieh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating flash memory cells
- Patent number 5,899,718
- Issue date May 4, 1999
- United Semiconductor Corp.
- Hwi-Huang Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Buried structure SRAM cell and methods for fabrication
- Patent number 5,821,629
- Issue date Oct 13, 1998
- United Microelectronics Corporation
- Jemmy Wen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Grounding method for eliminating process antenna effect
- Patent number 5,817,577
- Issue date Oct 6, 1998
- United Microelectronics Corp.
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating EPROM memory by individually forming gate oxi...
- Patent number 5,716,874
- Issue date Feb 10, 1998
- United Microelectronics Corporation
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Local punchthrough stop for ultra large scale integration devices
- Patent number 5,686,321
- Issue date Nov 11, 1997
- United Microelectronics Corp.
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Retarded double diffused drain device structure
- Patent number 5,654,569
- Issue date Aug 5, 1997
- United Microelectronics Corporation
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for ESD protection circuit with deep source diffusion
- Patent number 5,646,062
- Issue date Jul 8, 1997
- United Microelectronics Corporation
- Lee Chung Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a buried structure SRAM cell
- Patent number 5,602,049
- Issue date Feb 11, 1997
- United Microelectronics Corporation
- Jemmy Wen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Complementary LVTSCR ESD protection circuit for sub-micron CMOS int...
- Patent number 5,576,557
- Issue date Nov 19, 1996
- United Microelectronics Corp.
- Ming-Dou Ker
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Field effect transistor structure of a diving channel device
- Patent number 5,574,302
- Issue date Nov 12, 1996
- United Microelectronics Corporation
- Jemmy Wen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making retarded DDD (double diffused drain) device structure
- Patent number 5,565,369
- Issue date Oct 15, 1996
- United Microelectronics Corporation
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Surface counter doped N-LDD for high carrier reliability
- Patent number 5,565,700
- Issue date Oct 15, 1996
- United Microelectronics Corporation
- Jih W. Chou
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
ESD protection improvement
- Patent number 5,559,352
- Issue date Sep 24, 1996
- United Microelectronics Corporation
- Chen-Chiu Hsue
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Maskless method for formation of a field implant channel stop region
- Patent number 5,518,941
- Issue date May 21, 1996
- United Microelectronics Corporation
- Chih-Hung Lin
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Method of forming shallow trench isolation
- Publication number 20020182824
- Publication date Dec 5, 2002
- United Microelectronics Corp.
- Ying-Jen Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor device with an anti-doped region
- Publication number 20020089021
- Publication date Jul 11, 2002
- Joe Ko
- H01 - BASIC ELECTRIC ELEMENTS

Person

Patents Grantslast 30 patents

Bar circuit for an integrated circuit

Method for forming a self-aligned silicide layer

Method for manufacturing capacitor

Method for manufacturing capacitor

Method of fabricating a mixed circuit capacitor

Method of stabilizing anti-reflection coating layer

Method of stabilizing anti-reflection coating layer

Method of forming shallow trench isolation

Method for fabricating flash memory

Method of fabricating high voltage semiconductor device

Method of fabricating flash memory

Method for prevention of latch-up of CMOS devices

Structure of a flash memory

Method of fabricating an electrically erasable and programmable rea...

Method of fabricating electrostatic discharge protection device

Process of forming a field effect transistor without spacer mask ed...

Method for fabricating flash memory cells

Buried structure SRAM cell and methods for fabrication

Grounding method for eliminating process antenna effect

Method of fabricating EPROM memory by individually forming gate oxi...

Local punchthrough stop for ultra large scale integration devices

Retarded double diffused drain device structure

Method for ESD protection circuit with deep source diffusion

Method of fabricating a buried structure SRAM cell

Complementary LVTSCR ESD protection circuit for sub-micron CMOS int...

Field effect transistor structure of a diving channel device

Method of making retarded DDD (double diffused drain) device structure

Surface counter doped N-LDD for high carrier reliability

ESD protection improvement

Maskless method for formation of a field implant channel stop region

Patents Applicationslast 30 patents

Method of forming shallow trench isolation

Semiconductor device with an anti-doped region