Joel Reuben Phillips

Person

Oakland, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method, system, and computer program product for characterizing an...
- Patent number 12,141,233
- Issue date Nov 12, 2024
- Cadence Design Systems, Inc.
- Marco Tony Lloyd Kassis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for transient simulation of circuits with mutua...
- Patent number 10,860,767
- Issue date Dec 8, 2020
- Cadence Design Systems, Inc.
- Mina Adel Aziz Farhan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reduced resource harmonic balance circuit simulations
- Patent number 10,423,744
- Issue date Sep 24, 2019
- Cadence Design Systems, Inc.
- Joel Reuben Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for efficient device testing and validation of fa...
- Patent number 10,068,044
- Issue date Sep 4, 2018
- Cadence Design Systems, Inc.
- Yinghong Zhou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Static timing analysis methods for integrated circuit designs using...
- Patent number 8,966,421
- Issue date Feb 24, 2015
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch and bound techniques for computation of critical timing cond...
- Patent number 8,799,840
- Issue date Aug 5, 2014
- Cadence Design Systems, Inc.
- Luis Guerra e Silva
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Waveform based variational static timing analysis
- Patent number 8,782,583
- Issue date Jul 15, 2014
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating an equivalent waveform model in static timing analysis
- Patent number 8,726,211
- Issue date May 13, 2014
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods, systems, and apparatus for timing and signal integrity ana...
- Patent number 8,631,369
- Issue date Jan 14, 2014
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Equivalent waveform model for static timing analysis of integrated...
- Patent number 8,601,420
- Issue date Dec 3, 2013
- Cadence Design Systems, Inc.
- Igor Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-CCC current source models and static timing analysis methods...
- Patent number 8,533,644
- Issue date Sep 10, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sensitivity and static timing analysis for integrated circuit desig...
- Patent number 8,516,420
- Issue date Aug 20, 2013
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,375,343
- Issue date Feb 12, 2013
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boolean satisfiability based verification of analog circuits
- Patent number 8,341,567
- Issue date Dec 25, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,341,572
- Issue date Dec 25, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for implementing a waveform viewer
- Patent number 8,325,188
- Issue date Dec 4, 2012
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch and bound techniques for computation of critical timing cond...
- Patent number 8,245,167
- Issue date Aug 14, 2012
- Cadence Design Systems, Inc.
- Luis Guerra e Silva
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for waveform based variational static timing...
- Patent number 8,245,165
- Issue date Aug 14, 2012
- Cadence Design Systems, Inc.
- Saurabh K. Tiwary
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for simulating quasi-periodic circuit operatin...
- Patent number 8,195,440
- Issue date Jun 5, 2012
- Cadence Design Systems, Inc.
- Dan Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parametric perturbations of performance metrics for integrated circ...
- Patent number 8,180,621
- Issue date May 15, 2012
- Cadence Design Systems, Inc.
- Joel Reuben Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for reducing model order exploiting sparsity in electronic d...
- Patent number 7,996,193
- Issue date Aug 9, 2011
- Cadence Design Systems, Inc.
- Zuochang Ye
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Timing and signal integrity analysis of integrated circuits with se...
- Patent number 7,882,471
- Issue date Feb 1, 2011
- Cadence Design Systems, Inc.
- Vinod Kariat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parasitic effects analysis of circuit structures
- Patent number 7,853,910
- Issue date Dec 14, 2010
- Cadence Design Systems, Inc.
- Zhenhai Zhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit analysis utilizing rank revealing factorization
- Patent number 7,590,518
- Issue date Sep 15, 2009
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for chip design using physically appropriate comp...
- Patent number 7,533,359
- Issue date May 12, 2009
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for simulating quasi-periodic circuit operatin...
- Patent number 7,493,240
- Issue date Feb 17, 2009
- Cadence Design Systems, Inc.
- Dan Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for modeling distributed time invariant systems
- Patent number 7,487,078
- Issue date Feb 3, 2009
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation of electrical circuits
- Patent number 7,428,477
- Issue date Sep 23, 2008
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for multi-interval collocation for efficient high...
- Patent number 7,035,782
- Issue date Apr 25, 2006
- Cadence Design Systems, Inc.
- Baolin Yang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for modeling time-varying systems and non-linear...
- Patent number 6,349,272
- Issue date Feb 19, 2002
- Cadence Design Systems, Inc.
- Joel Phillips
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
GENERATING AN EQUIVALENT WAVEFORM MODEL IN STATIC TIMING ANALYSIS
- Publication number 20140096099
- Publication date Apr 3, 2014
- Cadence Design Systems, Inc.
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR REDUCING MODEL ORDER EXPLOITING SPARSITY
- Publication number 20090265150
- Publication date Oct 22, 2009
- Cadence Design Systems, Inc.
- ZUOCHANG YE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARAMETRIC PERTURBATIONS OF PERFORMANCE METRICS FOR INTEGRATED CIRC...
- Publication number 20090228250
- Publication date Sep 10, 2009
- Cadence Design Systems, Inc.
- Joel Reuben Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR SIMULATING QUASI-PERIODIC CIRCUIT OPERATIN...
- Publication number 20090210202
- Publication date Aug 20, 2009
- Cadence Design Systems, Inc.
- Dan Feng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for chip design using physically appropriate comp...
- Publication number 20060265680
- Publication date Nov 23, 2006
- Cadence Design Systems, Inc.
- Louis K. Scheffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit analysis utilizing rank revealing factorization
- Publication number 20060095236
- Publication date May 4, 2006
- Joel R. Phillips
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and device for multi-interval collocation for efficient high...
- Publication number 20030144824
- Publication date Jul 31, 2003
- Baolin Yang
- G06 - COMPUTING CALCULATING COUNTING

Joel Reuben Phillips

Person

Patents Grantslast 30 patents

Method, system, and computer program product for characterizing an...

Systems and methods for transient simulation of circuits with mutua...

Reduced resource harmonic balance circuit simulations

System and method for efficient device testing and validation of fa...

Static timing analysis methods for integrated circuit designs using...

Branch and bound techniques for computation of critical timing cond...

Waveform based variational static timing analysis

Generating an equivalent waveform model in static timing analysis

Methods, systems, and apparatus for timing and signal integrity ana...

Equivalent waveform model for static timing analysis of integrated...

Multi-CCC current source models and static timing analysis methods...

Sensitivity and static timing analysis for integrated circuit desig...

Methods and apparatus for waveform based variational static timing...

Boolean satisfiability based verification of analog circuits

Methods and apparatus for waveform based variational static timing...

Method and system for implementing a waveform viewer

Branch and bound techniques for computation of critical timing cond...

Methods and apparatus for waveform based variational static timing...

Method and apparatus for simulating quasi-periodic circuit operatin...

Parametric perturbations of performance metrics for integrated circ...

Method for reducing model order exploiting sparsity in electronic d...

Timing and signal integrity analysis of integrated circuits with se...

Parasitic effects analysis of circuit structures

Circuit analysis utilizing rank revealing factorization

Method and system for chip design using physically appropriate comp...

Method and apparatus for simulating quasi-periodic circuit operatin...

Method and system for modeling distributed time invariant systems

Simulation of electrical circuits

Method and device for multi-interval collocation for efficient high...

Method and system for modeling time-varying systems and non-linear...

Patents Applicationslast 30 patents

GENERATING AN EQUIVALENT WAVEFORM MODEL IN STATIC TIMING ANALYSIS

METHOD FOR REDUCING MODEL ORDER EXPLOITING SPARSITY

PARAMETRIC PERTURBATIONS OF PERFORMANCE METRICS FOR INTEGRATED CIRC...

METHOD AND APPARATUS FOR SIMULATING QUASI-PERIODIC CIRCUIT OPERATIN...

Method and system for chip design using physically appropriate comp...

Circuit analysis utilizing rank revealing factorization

Method and device for multi-interval collocation for efficient high...