Johannes von Kluge

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit element including a layer of a stress-creating material pro...
- Patent number 9,537,006
- Issue date Jan 3, 2017
- GLOBALFOUNDRIES Inc.
- Johannes von Kluge
- G05 - CONTROLLING REGULATING
Information Patent Grant
Circuit element including a layer of a stress-creating material pro...
- Patent number 9,209,174
- Issue date Dec 8, 2015
- GLOBALFOUNDRIES Inc.
- Johannes von Kluge
- G05 - CONTROLLING REGULATING
Information Patent Grant
Methods for etching dielectric materials in the fabrication of inte...
- Patent number 9,054,041
- Issue date Jun 9, 2015
- GLOBALFOUNDRIES, INC.
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a semiconductor structure including a wet etch pr...
- Patent number 8,716,136
- Issue date May 6, 2014
- GLOBALFOUNDRIES Inc.
- Berthold Reimer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having a material structured by a projection
- Patent number 8,115,277
- Issue date Feb 14, 2012
- Qimonda AG
- Johannes von Kluge
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of making an integrated circuit including structuring a mate...
- Patent number 7,888,230
- Issue date Feb 15, 2011
- Qimonda AG
- Johannes von Kluge
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Grant
Method of manufacturing a transistor and memory cell array
- Patent number 7,763,514
- Issue date Jul 27, 2010
- Qimonda AG
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT ELEMENT INCLUDING A LAYER OF A STRESS-CREATING MATERIAL PRO...
- Publication number 20160056288
- Publication date Feb 25, 2016
- GLOBALFOUNDRIES INC.
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTE...
- Publication number 20150235906
- Publication date Aug 20, 2015
- GLOBALFOUNDRIES, Inc.
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTE...
- Publication number 20150024578
- Publication date Jan 22, 2015
- GLOBALFOUNDRIES, Inc.
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT ELEMENT INCLUDING A LAYER OF A STRESS-CREATING MATERIAL PRO...
- Publication number 20140232433
- Publication date Aug 21, 2014
- GLOBALFOUNDRIES INC.
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A WET ETCH PR...
- Publication number 20140113455
- Publication date Apr 24, 2014
- GLOBALFOUNDRIES INC.
- Berthold Reimer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING STRESS-INDUCING LAYERS ON SEMICONDUCTOR DEVICES
- Publication number 20140042549
- Publication date Feb 13, 2014
- GLOBALFOUNDRIES INC.
- Johannes Von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD INCLUDING STRUCTURING A MATERIAL
- Publication number 20110090616
- Publication date Apr 21, 2011
- QIMONDA AG
- Johannes Von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INSULATOR MATERIAL OVER BURIED CONDUCTIVE LINE
- Publication number 20090321805
- Publication date Dec 31, 2009
- QIMONDA AG
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MANUFACTURING METHOD FOR AN INTEGRATED CIRCUIT STRUCTURE COMPRISING...
- Publication number 20090176368
- Publication date Jul 9, 2009
- Nan Wu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT AND METHOD INCLUDING STRUCTURING A MATERIAL
- Publication number 20080315357
- Publication date Dec 25, 2008
- QIMONDA AG
- Johannes Von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor, Memory Cell Array and Method of Manufacturing a Transistor
- Publication number 20080061320
- Publication date Mar 13, 2008
- QIMONDA AG
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Transistor, memory cell array and method of manufacturing a transistor
- Publication number 20080061322
- Publication date Mar 13, 2008
- Johannes von Kluge
- H01 - BASIC ELECTRIC ELEMENTS

Johannes von Kluge

Person

Patents Grantslast 30 patents

Circuit element including a layer of a stress-creating material pro...

Circuit element including a layer of a stress-creating material pro...

Methods for etching dielectric materials in the fabrication of inte...

Method of forming a semiconductor structure including a wet etch pr...

Integrated circuit having a material structured by a projection

Method of making an integrated circuit including structuring a mate...

Method of manufacturing a transistor and memory cell array

Patents Applicationslast 30 patents

CIRCUIT ELEMENT INCLUDING A LAYER OF A STRESS-CREATING MATERIAL PRO...

METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTE...

METHODS FOR ETCHING DIELECTRIC MATERIALS IN THE FABRICATION OF INTE...

CIRCUIT ELEMENT INCLUDING A LAYER OF A STRESS-CREATING MATERIAL PRO...

METHOD OF FORMING A SEMICONDUCTOR STRUCTURE INCLUDING A WET ETCH PR...

METHODS OF FORMING STRESS-INDUCING LAYERS ON SEMICONDUCTOR DEVICES

INTEGRATED CIRCUIT AND METHOD INCLUDING STRUCTURING A MATERIAL

INSULATOR MATERIAL OVER BURIED CONDUCTIVE LINE

MANUFACTURING METHOD FOR AN INTEGRATED CIRCUIT STRUCTURE COMPRISING...

INTEGRATED CIRCUIT AND METHOD INCLUDING STRUCTURING A MATERIAL

Transistor, Memory Cell Array and Method of Manufacturing a Transistor

Transistor, memory cell array and method of manufacturing a transistor