John Crawford

Person

Saratoga, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Techniques for probabilistic dynamic random access memory row repair
- Patent number 10,102,886
- Issue date Oct 16, 2018
- Intel Corporation
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping a physical address differently to different memory devices...
- Patent number 9,934,143
- Issue date Apr 3, 2018
- Intel Corporation
- Kuljit S. Bains
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Refresh parameter-dependent memory refresh management
- Patent number 9,910,604
- Issue date Mar 6, 2018
- Intel Corporation
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Grant
Managing power consumption and performance of computing systems
- Patent number 9,857,858
- Issue date Jan 2, 2018
- Intel Corporation
- Devadatta V. Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for determining victim row addresses in a volatile memory
- Patent number 9,824,754
- Issue date Nov 21, 2017
- Intel Corporation
- Sreenivas Mandava
- G11 - INFORMATION STORAGE
Information Patent Grant
PCIE device power state control
- Patent number 9,778,720
- Issue date Oct 3, 2017
- Intel Corporation
- Anil K. Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing the operation of a computing device by determining perform...
- Patent number 9,524,009
- Issue date Dec 20, 2016
- Intel Corporation
- Devadatta V. Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for probabilistic dynamic random access memory row repair
- Patent number 9,449,671
- Issue date Sep 20, 2016
- Intel Corporation
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronizing multiple threads efficiently
- Patent number 9,405,595
- Issue date Aug 2, 2016
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Techniques for determining victim row addresses in a volatile memory
- Patent number 9,269,436
- Issue date Feb 23, 2016
- Intel Corporation
- Sreenivas Mandava
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory refresh management
- Patent number 9,269,417
- Issue date Feb 23, 2016
- Intel Corporation
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Grant
Periodic activity alignment
- Patent number 9,213,390
- Issue date Dec 15, 2015
- Intel Corporation
- Eugene Gorbatov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanisms to avoid inefficient core hopping and provide hardware a...
- Patent number 8,887,171
- Issue date Nov 11, 2014
- Intel Corporation
- Justin J. Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing multiple threads efficiently
- Patent number 8,819,684
- Issue date Aug 26, 2014
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for communication between two or more processi...
- Patent number 8,645,959
- Issue date Feb 4, 2014
- Intel Corporaiton
- Kushagra Vaid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing multiple threads efficiently
- Patent number 8,473,963
- Issue date Jun 25, 2013
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction based shared data operations in a multiprocessor enviro...
- Patent number 8,458,412
- Issue date Jun 4, 2013
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction based shared data operations in a multiprocessor enviro...
- Patent number 8,176,266
- Issue date May 8, 2012
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction based shared data operations in a multiprocessor enviro...
- Patent number 7,984,248
- Issue date Jul 19, 2011
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Synchronizing multiple threads efficiently
- Patent number 7,937,709
- Issue date May 3, 2011
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tracking health of integrated circuit structures
- Patent number 7,877,666
- Issue date Jan 25, 2011
- Intel Corporation
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for run-ahead victim selection to reduce undes...
- Patent number 7,669,009
- Issue date Feb 23, 2010
- Intel Corporation
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for protecting TLB's VPN from soft errors
- Patent number 7,607,048
- Issue date Oct 20, 2009
- Intel Corporation
- Ugonna C. Echeruo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing single-cycle addition or subtra...
- Patent number 7,395,304
- Issue date Jul 1, 2008
- Intel Corporation
- Bharat Bhushan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to provide a source operand for an instruction...
- Patent number 7,395,415
- Issue date Jul 1, 2008
- Intel Corporation
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for protecting critical resources against soft...
- Patent number 7,383,468
- Issue date Jun 3, 2008
- Intel Corporation
- Nhon T. Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for protecting vector tags in high performance m...
- Patent number 7,315,920
- Issue date Jan 1, 2008
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer system and method for executing interrupt instructions in...
- Patent number 7,010,671
- Issue date Mar 7, 2006
- Intel Corporation
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Patent number 6,904,502
- Issue date Jun 7, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Patent number 6,839,814
- Issue date Jan 4, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Techniques for Probabilistic Dynamic Random Access Memory Row Repair
- Publication number 20170103795
- Publication date Apr 13, 2017
- Intel Corporation
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY REFRESH MANAGEMENT
- Publication number 20170024148
- Publication date Jan 26, 2017
- Intel Corporation
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Determining Victim Row Addresses in a Volatile Memory
- Publication number 20160224262
- Publication date Aug 4, 2016
- Intel Corporation
- SREENIVAS MANDAVA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING POWER CONSUMPTION AND PERFORMANCE OF COMPUTING SYSTEMS
- Publication number 20150169026
- Publication date Jun 18, 2015
- Devadatta V. Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING A PHYSICAL ADDRESS DIFFERENTLY TO DIFFERENT MEMORY DEVICES...
- Publication number 20150089183
- Publication date Mar 26, 2015
- KULJIT S. BAINS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing Multiple Threads Efficiently
- Publication number 20140337857
- Publication date Nov 13, 2014
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PCIE DEVICE POWER STATE CONTROL
- Publication number 20140310550
- Publication date Oct 16, 2014
- Intel Corporation
- Anil K. Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Probabilistic Dynamic Random Access Memory Row Repair
- Publication number 20140281206
- Publication date Sep 18, 2014
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING THE OPERATION OF A COMPUTING SYSTEM
- Publication number 20140281647
- Publication date Sep 18, 2014
- Devadatta V. Bodas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Techniques for Determining Victim Row Addresses in a Volatile Memory
- Publication number 20140281207
- Publication date Sep 18, 2014
- Sreenivas Mandava
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY REFRESH MANAGEMENT
- Publication number 20140192605
- Publication date Jul 10, 2014
- John H. Crawford
- G11 - INFORMATION STORAGE
Information Patent Application
PERIODIC ACTIVITY ALIGNMENT
- Publication number 20140189403
- Publication date Jul 3, 2014
- Eugene Gorbatov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR RETAINING COHERENT CACHE CONTENTS DURING DEEP...
- Publication number 20140095801
- Publication date Apr 3, 2014
- Devadatta V. BODAS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing Multiple Threads Efficiently
- Publication number 20130275995
- Publication date Oct 17, 2013
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION BASED SHARED DATA OPERATIONS IN A MULTIPROCESSOR ENVIRO...
- Publication number 20110252203
- Publication date Oct 13, 2011
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing Multiple Threads Efficiently
- Publication number 20110173634
- Publication date Jul 14, 2011
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MECHANISMS TO AVOID INEFFICIENT CORE HOPPING AND PROVIDE HARDWARE A...
- Publication number 20110161627
- Publication date Jun 30, 2011
- Justin J. Song
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSACTION BASED SHARED DATA OPERATIONS IN A MULTIPROCESSOR ENVIRO...
- Publication number 20110055493
- Publication date Mar 3, 2011
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRACKING HEALTH OF INTEGRATED CIRCUIT STRUCTURES
- Publication number 20080163014
- Publication date Jul 3, 2008
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for communication between two or more processi...
- Publication number 20060225074
- Publication date Oct 5, 2006
- Kushagra Vaid
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transaction based shared data operations in a multiprocessor enviro...
- Publication number 20060161740
- Publication date Jul 20, 2006
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for protecting TLB's VPN from soft errors
- Publication number 20060150048
- Publication date Jul 6, 2006
- Ugonna C. Echeruo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Synchronizing multiple threads efficiently
- Publication number 20060143361
- Publication date Jun 29, 2006
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus to provide a source operand for an instruction...
- Publication number 20060095728
- Publication date May 4, 2006
- Gary Hammond
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for run-ahead victim selection to reduce undes...
- Publication number 20060064547
- Publication date Mar 23, 2006
- Sailesh Kottapalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for protecting vector tags in high performance m...
- Publication number 20050120184
- Publication date Jun 2, 2005
- Intel Corporation
- Nhon Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computer system and method for executing interrupt instructions in...
- Publication number 20050091480
- Publication date Apr 28, 2005
- John H. Crawford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for performing single-cycle addition or subtra...
- Publication number 20040267863
- Publication date Dec 30, 2004
- Bharat Bhushan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Publication number 20040139280
- Publication date Jul 15, 2004
- Intel Corporation
- Nhon T. Quach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit and method for protecting 1-hot and 2-hot vector tags in hi...
- Publication number 20040078529
- Publication date Apr 22, 2004
- Intel Corporation
- Nhon T. Quach
- G06 - COMPUTING CALCULATING COUNTING

John Crawford

Person

Patents Grantslast 30 patents

Techniques for probabilistic dynamic random access memory row repair

Mapping a physical address differently to different memory devices...

Refresh parameter-dependent memory refresh management

Managing power consumption and performance of computing systems

Techniques for determining victim row addresses in a volatile memory

PCIE device power state control

Managing the operation of a computing device by determining perform...

Techniques for probabilistic dynamic random access memory row repair

Synchronizing multiple threads efficiently

Techniques for determining victim row addresses in a volatile memory

Memory refresh management

Periodic activity alignment

Mechanisms to avoid inefficient core hopping and provide hardware a...

Synchronizing multiple threads efficiently

Method and apparatus for communication between two or more processi...

Synchronizing multiple threads efficiently

Transaction based shared data operations in a multiprocessor enviro...

Transaction based shared data operations in a multiprocessor enviro...

Transaction based shared data operations in a multiprocessor enviro...

Synchronizing multiple threads efficiently

Tracking health of integrated circuit structures

Method and apparatus for run-ahead victim selection to reduce undes...

Method and apparatus for protecting TLB's VPN from soft errors

Method and apparatus for performing single-cycle addition or subtra...

Method and apparatus to provide a source operand for an instruction...

Apparatus and method for protecting critical resources against soft...

Circuit and method for protecting vector tags in high performance m...

Computer system and method for executing interrupt instructions in...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Patents Applicationslast 30 patents

Techniques for Probabilistic Dynamic Random Access Memory Row Repair

MEMORY REFRESH MANAGEMENT

Techniques for Determining Victim Row Addresses in a Volatile Memory

MANAGING POWER CONSUMPTION AND PERFORMANCE OF COMPUTING SYSTEMS

MAPPING A PHYSICAL ADDRESS DIFFERENTLY TO DIFFERENT MEMORY DEVICES...

Synchronizing Multiple Threads Efficiently

PCIE DEVICE POWER STATE CONTROL

Techniques for Probabilistic Dynamic Random Access Memory Row Repair

MANAGING THE OPERATION OF A COMPUTING SYSTEM

Techniques for Determining Victim Row Addresses in a Volatile Memory

MEMORY REFRESH MANAGEMENT

PERIODIC ACTIVITY ALIGNMENT

SYSTEM AND METHOD FOR RETAINING COHERENT CACHE CONTENTS DURING DEEP...

Synchronizing Multiple Threads Efficiently

TRANSACTION BASED SHARED DATA OPERATIONS IN A MULTIPROCESSOR ENVIRO...

Synchronizing Multiple Threads Efficiently

MECHANISMS TO AVOID INEFFICIENT CORE HOPPING AND PROVIDE HARDWARE A...

TRANSACTION BASED SHARED DATA OPERATIONS IN A MULTIPROCESSOR ENVIRO...

TRACKING HEALTH OF INTEGRATED CIRCUIT STRUCTURES

Method and apparatus for communication between two or more processi...

Transaction based shared data operations in a multiprocessor enviro...

Method and apparatus for protecting TLB's VPN from soft errors

Synchronizing multiple threads efficiently

Method and apparatus to provide a source operand for an instruction...

Method and apparatus for run-ahead victim selection to reduce undes...

Circuit and method for protecting vector tags in high performance m...

Computer system and method for executing interrupt instructions in...

Method and apparatus for performing single-cycle addition or subtra...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...

Circuit and method for protecting 1-hot and 2-hot vector tags in hi...