John Fong

Person

Quincy, MA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Decoder based set associative repair cache systems and methods
- Patent number 7,630,258
- Issue date Dec 8, 2009
- Texas Instruments Incorporated
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Grant
Low resistance plate line bus architecture
- Patent number 7,443,708
- Issue date Oct 28, 2008
- Texas Instruments Incorporated
- Sudhir Kumar Madan
- G11 - INFORMATION STORAGE
Information Patent Grant
Plateline driver with RAMP rate control
- Patent number 7,349,237
- Issue date Mar 25, 2008
- Texas Instruments Incorporated
- Sung-Wei Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Accelerated low power fatigue testing of FRAM
- Patent number 7,301,795
- Issue date Nov 27, 2007
- Texas Instruments Incorporated
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Grant
Plateline voltage pulsing to reduce storage node disturbance in fer...
- Patent number 7,193,880
- Issue date Mar 20, 2007
- Texas Instruments Incorporated
- Sudhir Kumar Madan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for reducing access transistor gate oxide stress
- Patent number 6,809,954
- Issue date Oct 26, 2004
- Texas Instruments Incorporated
- Sudhir K. Madan
- G11 - INFORMATION STORAGE
Information Patent Grant
Accelerated fatigue testing
- Patent number 6,735,106
- Issue date May 11, 2004
- Agilent Technologies, Inc.
- Juergen T. Rickes
- G11 - INFORMATION STORAGE
Information Patent Grant
On-chip charge distribution measurement circuit
- Patent number 6,590,799
- Issue date Jul 8, 2003
- Agilent Technologies, Inc.
- Juergen T. Rickes
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LOW RESISTANCE PLATE LINE BUS ARCHITECTURE
- Publication number 20090010038
- Publication date Jan 8, 2009
- TEXAS INSTRUMENTS INCORPORATED
- SUDHIR KUMAR MADAN
- G11 - INFORMATION STORAGE
Information Patent Application
Plateline Driver with Ramp Rate Control
- Publication number 20080079471
- Publication date Apr 3, 2008
- TEXAS INSTRUMENTS INCORPORATED
- Sung-Wei Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Low resistance plate line bus architecture
- Publication number 20070211510
- Publication date Sep 13, 2007
- TEXAS INSTRUMENTS INCORPORATED
- Sudhir Kumar Madan
- G11 - INFORMATION STORAGE
Information Patent Application
Accelerated low power fatigue testing of fram
- Publication number 20060107095
- Publication date May 18, 2006
- TEXAS INSTRUMENTS INCORPORATED
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Decoder based set associative repair cache systems and methods
- Publication number 20060085700
- Publication date Apr 20, 2006
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Direct mapped repair cache systems and methods
- Publication number 20060077734
- Publication date Apr 13, 2006
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Set associative repair cache systems and methods
- Publication number 20060080572
- Publication date Apr 13, 2006
- John Y. Fong
- G11 - INFORMATION STORAGE
Information Patent Application
Plateline voltage pulsing to reduce storage node disturbance in fer...
- Publication number 20050276089
- Publication date Dec 15, 2005
- Sudhir Kumar Madan
- G11 - INFORMATION STORAGE
Information Patent Application
Plateline driver with RAMP rate control
- Publication number 20050078504
- Publication date Apr 14, 2005
- Sung-Wei Lin
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Accelerated fatigue testing
- Publication number 20040004854
- Publication date Jan 8, 2004
- Juergen T. Rickes
- G11 - INFORMATION STORAGE

Person

Patents Grantslast 30 patents

Decoder based set associative repair cache systems and methods

Low resistance plate line bus architecture

Plateline driver with RAMP rate control

Accelerated low power fatigue testing of FRAM

Plateline voltage pulsing to reduce storage node disturbance in fer...

Circuit and method for reducing access transistor gate oxide stress

Accelerated fatigue testing

On-chip charge distribution measurement circuit

Patents Applicationslast 30 patents

LOW RESISTANCE PLATE LINE BUS ARCHITECTURE

Plateline Driver with Ramp Rate Control

Low resistance plate line bus architecture

Accelerated low power fatigue testing of fram

Decoder based set associative repair cache systems and methods

Direct mapped repair cache systems and methods

Set associative repair cache systems and methods

Plateline voltage pulsing to reduce storage node disturbance in fer...

Plateline driver with RAMP rate control

Accelerated fatigue testing