John FREDIANI

Person

Corralitos, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for acquisition of test data
- Patent number 11,041,907
- Issue date Jun 22, 2021
- Advantest Corporation
- Ben Rogel-Favila
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for acquisition of test data
- Patent number 10,634,723
- Issue date Apr 28, 2020
- Advantest Corporation
- Ben Rogel-Favila
- G01 - MEASURING TESTING
Information Patent Grant
Tester with acceleration on memory and acceleration for automatic p...
- Patent number 10,161,993
- Issue date Dec 25, 2018
- Advantest Corporation
- John Frediani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tester with acceleration for packet building within a FPGA block
- Patent number 9,810,729
- Issue date Nov 7, 2017
- Advantest Corporation
- John Frediani
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for estimating a position of a stuck-at defec...
- Patent number 8,127,186
- Issue date Feb 28, 2012
- Verigy (Singapore) Pte. Ltd.
- Phillip D. Burlison
- G01 - MEASURING TESTING
Information Patent Grant
Dynamic mask memory for serial scan testing
- Patent number 7,865,788
- Issue date Jan 4, 2011
- Verigy (Singapore) Pte. Ltd.
- Phillip D. Burlison
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus for locating a defect in a scan chain while testing digit...
- Patent number 7,650,547
- Issue date Jan 19, 2010
- Verigy (Singapore) Pte. Ltd.
- Phillip D. Burlison
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR ACQUISITION OF TEST DATA
- Publication number 20200033408
- Publication date Jan 30, 2020
- Advantest Corporation
- Ben ROGEL-FAVILA
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND SYSTEM FOR ACQUISITION OF TEST DATA
- Publication number 20180188322
- Publication date Jul 5, 2018
- Advantest Corporation
- Ben ROGEL-FAVILA
- G01 - MEASURING TESTING
Information Patent Application
TESTER WITH ACCELERATION FOR PACKET BUILDING WITHIN A FPGA BLOCK
- Publication number 20140244204
- Publication date Aug 28, 2014
- Advantest Corporation
- John Frediani
- G01 - MEASURING TESTING
Information Patent Application
TESTER WITH ACCELERATION ON MEMORY AND ACCELERATION FOR AUTOMATIC P...
- Publication number 20140236524
- Publication date Aug 21, 2014
- Advantest Corporation
- John FREDIANI
- G01 - MEASURING TESTING
Information Patent Application
TESTER WITH MIXED PROTOCOL ENGINE IN A FPGA BLOCK
- Publication number 20140236526
- Publication date Aug 21, 2014
- Advantest Corporation
- John FREDIANI
- G01 - MEASURING TESTING
Information Patent Application
DYNAMIC MASK MEMORY FOR SERIAL SCAN TESTING
- Publication number 20090132870
- Publication date May 21, 2009
- Inovys Corporation
- PHILLIP BURLISON
- G01 - MEASURING TESTING
Information Patent Application
Methods and apparatus for estimating a position of a stuck-at defec...
- Publication number 20080215940
- Publication date Sep 4, 2008
- Phillip D. Burlison
- G01 - MEASURING TESTING
Information Patent Application
APPARATUS FOR LOCATING A DEFECT IN A SCAN CHAIN WHILE TESTING DIGIT...
- Publication number 20080209288
- Publication date Aug 28, 2008
- Inovys Corporation
- PHIL BURLISON
- G01 - MEASURING TESTING

John FREDIANI

Person

Patents Grantslast 30 patents

Method and system for acquisition of test data

Method and system for acquisition of test data

Tester with acceleration on memory and acceleration for automatic p...

Tester with acceleration for packet building within a FPGA block

Methods and apparatus for estimating a position of a stuck-at defec...

Dynamic mask memory for serial scan testing

Apparatus for locating a defect in a scan chain while testing digit...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR ACQUISITION OF TEST DATA

METHOD AND SYSTEM FOR ACQUISITION OF TEST DATA

TESTER WITH ACCELERATION FOR PACKET BUILDING WITHIN A FPGA BLOCK

TESTER WITH ACCELERATION ON MEMORY AND ACCELERATION FOR AUTOMATIC P...

TESTER WITH MIXED PROTOCOL ENGINE IN A FPGA BLOCK

DYNAMIC MASK MEMORY FOR SERIAL SCAN TESTING

Methods and apparatus for estimating a position of a stuck-at defec...

APPARATUS FOR LOCATING A DEFECT IN A SCAN CHAIN WHILE TESTING DIGIT...