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John L. Redford

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  • Arlington, MA, US
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Patents Grantslast 30 patents

  • Information Patent Grant

    Paralleizing loops in the presence of possible memory aliases
    • Patent number 10,241,793
    • Issue date Mar 26, 2019
    • Analog Devices Global
    • Michael G. Perkins
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    Cache way prediction
    • Patent number 9,460,016
    • Issue date Oct 4, 2016
    • ANALOG DEVICES GLOBAL HAMILTON
    • John L. Redford
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    Predicate counter
    • Patent number 9,342,306
    • Issue date May 17, 2016
    • Analog Devices Global
    • Andrew J. Higham
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    Memory interconnect network architecture for vector processor
    • Patent number 9,201,828
    • Issue date Dec 1, 2015
    • Analog Devices, Inc.
    • Kaushal Sanghai
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    Parallel atomic increment
    • Patent number 9,146,885
    • Issue date Sep 29, 2015
    • Analog Devices, Inc.
    • Boris Lerner
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Grant

    DMA vector buffer
    • Patent number 9,092,429
    • Issue date Jul 28, 2015
    • Analog Devices Global
    • Andrew J. Higham
    • G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

  • Information Patent Application

    SAMPLING VARIABLES FROM PROBABILISTIC MODELS
    • Publication number 20170017892
    • Publication date Jan 19, 2017
    • Analog Devices, Inc.
    • JEFFREY G. BERNSTEIN
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    CACHE WAY PREDICTION
    • Publication number 20150363318
    • Publication date Dec 17, 2015
    • Analog Devices Technology
    • JOHN L. REDFORD
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    PARALLEL ATOMIC INCREMENT
    • Publication number 20140344545
    • Publication date Nov 20, 2014
    • Analog Devices, Inc.
    • Boris Lerner
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    METHOD TO PARALLEIZE LOOPS IN THE PRESENCE OF POSSIBLE MEMORY ALIASES
    • Publication number 20140281435
    • Publication date Sep 18, 2014
    • Analog Devices Technology
    • Michael G. Perkins
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    MEMORY ARCHITECTURE
    • Publication number 20140115278
    • Publication date Apr 24, 2014
    • Analog Devices, Inc.
    • John L. Redford
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    DMA VECTOR BUFFER
    • Publication number 20140115195
    • Publication date Apr 24, 2014
    • Analog Devices Technology
    • Andrew J. Higham
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    MEMORY INTERCONNECT NETWORK ARCHITECTURE FOR VECTOR PROCESSOR
    • Publication number 20140115224
    • Publication date Apr 24, 2014
    • Analog Devices, Inc.
    • Kaushal Sanghai
    • G06 - COMPUTING CALCULATING COUNTING
  • Information Patent Application

    PREDICATE COUNTER
    • Publication number 20140115302
    • Publication date Apr 24, 2014
    • Analog Devices Technology
    • Andrew J. Higham
    • G06 - COMPUTING CALCULATING COUNTING