John L. Seabury

Person

Erie, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Bitwise operations and apparatus in a multi-level system
- Patent number 10,355,815
- Issue date Jul 16, 2019
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bitwise operations and apparatus in a multi-level system
- Patent number 9,374,343
- Issue date Jun 21, 2016
- Micron Technology, Inc.
- Bruce A. Liikanen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and methods of programming memory cells using adjustable...
- Patent number 9,336,083
- Issue date May 10, 2016
- Micron Technology, Inc.
- John L. Seabury
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory quality monitor based compensation method and apparatus
- Patent number 9,081,717
- Issue date Jul 14, 2015
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods of programming memory cells using adjustable...
- Patent number 8,990,644
- Issue date Mar 24, 2015
- Micron Technology, Inc.
- John L. Seabury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory quality monitor based compensation method and apparatus
- Patent number 8,862,969
- Issue date Oct 14, 2014
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitwise operations and apparatus in a multi-level system
- Patent number 8,627,165
- Issue date Jan 7, 2014
- Micron Technology, Inc.
- Bruce A. Liikanen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
At least semi-autonomous modules in a memory system and methods
- Patent number 8,595,415
- Issue date Nov 26, 2013
- Micron Technology, Inc.
- Stephen P. Van Aken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory quality monitor based compensation method and apparatus
- Patent number 8,499,227
- Issue date Jul 30, 2013
- Micron Technology, Inc.
- Bruce A. Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
High efficiency, error minimizing coding strategy method and apparatus
- Patent number RE43883
- Issue date Dec 25, 2012
- Seagate Technology LLC
- Steve McCarthy
- 714 - Error detection/correction and fault detection/recovery
Information Patent Grant
Method and apparatus for performing a self-servo write operation in...
- Patent number 7,623,313
- Issue date Nov 24, 2009
- Maxtor Corporation
- Bruce Liikanen
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for modifying spiral profile using reference t...
- Patent number 7,499,234
- Issue date Mar 3, 2009
- Maxtor Corporation
- Brian Rigney
- G11 - INFORMATION STORAGE
Information Patent Grant
High efficiency, error minimizing coding strategy method and apparatus
- Patent number 7,404,131
- Issue date Jul 22, 2008
- Maxtor Corporation
- Steve McCarthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for manufacture test processing a disk drive i...
- Patent number 6,950,967
- Issue date Sep 27, 2005
- Maxtor Corporation
- Don Brunnett
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
BITWISE OPERATIONS AND APPARATUS IN A MULTI-LEVEL SYSTEM
- Publication number 20160269147
- Publication date Sep 15, 2016
- Micron Technology, Inc.
- Bruce A. Liikanen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS OF PROGRAMMING MEMORY CELLS USING ADJUSTABLE...
- Publication number 20150169404
- Publication date Jun 18, 2015
- Micron Technology, Inc.
- John L. Seabury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY QUALITY MONITOR BASED COMPENSATION METHOD AND APPARATUS
- Publication number 20140380123
- Publication date Dec 25, 2014
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BITWISE OPERATIONS AND APPARATUS IN A MULTI-LEVEL SYSTEM
- Publication number 20140093076
- Publication date Apr 3, 2014
- Micron Technology, Inc.
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY QUALITY MONITOR BASED COMPENSATION METHOD AND APPARATUS
- Publication number 20130290811
- Publication date Oct 31, 2013
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and Methods of Programming Memory Cells using Adjustable...
- Publication number 20130166972
- Publication date Jun 27, 2013
- John L. Seabury
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AT LEAST SEMI-AUTONOMOUS MODULES IN A MEMORY SYSTEM AND METHODS
- Publication number 20120198129
- Publication date Aug 2, 2012
- Stephen P. Van Aken
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Quality Monitor Based Compensation Method and Apparatus
- Publication number 20120079353
- Publication date Mar 29, 2012
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Bitwise Operations and Apparatus in a Multi-Level System
- Publication number 20090241006
- Publication date Sep 24, 2009
- Bruce A. Liikanen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High efficiency, error minimizing coding strategy method and apparatus
- Publication number 20020099984
- Publication date Jul 25, 2002
- Steve McCarthy
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

John L. Seabury

Person

Patents Grantslast 30 patents

Bitwise operations and apparatus in a multi-level system

Bitwise operations and apparatus in a multi-level system

Apparatus and methods of programming memory cells using adjustable...

Memory quality monitor based compensation method and apparatus

Apparatus and methods of programming memory cells using adjustable...

Memory quality monitor based compensation method and apparatus

Bitwise operations and apparatus in a multi-level system

At least semi-autonomous modules in a memory system and methods

Memory quality monitor based compensation method and apparatus

High efficiency, error minimizing coding strategy method and apparatus

Method and apparatus for performing a self-servo write operation in...

Method and apparatus for modifying spiral profile using reference t...

High efficiency, error minimizing coding strategy method and apparatus

Method and apparatus for manufacture test processing a disk drive i...

Patents Applicationslast 30 patents

BITWISE OPERATIONS AND APPARATUS IN A MULTI-LEVEL SYSTEM

APPARATUS AND METHODS OF PROGRAMMING MEMORY CELLS USING ADJUSTABLE...

MEMORY QUALITY MONITOR BASED COMPENSATION METHOD AND APPARATUS

BITWISE OPERATIONS AND APPARATUS IN A MULTI-LEVEL SYSTEM

MEMORY QUALITY MONITOR BASED COMPENSATION METHOD AND APPARATUS

Apparatus and Methods of Programming Memory Cells using Adjustable...

AT LEAST SEMI-AUTONOMOUS MODULES IN A MEMORY SYSTEM AND METHODS

Memory Quality Monitor Based Compensation Method and Apparatus

Bitwise Operations and Apparatus in a Multi-Level System

High efficiency, error minimizing coding strategy method and apparatus