John Michael Greer

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Dynamically updating hardware prefetch trait to exclusive or shared...
- Patent number 10,514,920
- Issue date Dec 24, 2019
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory budgeted by ways based on memory access type
- Patent number 9,910,785
- Issue date Mar 6, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory budgeted by chunks based on memory access type
- Patent number 9,898,411
- Issue date Feb 20, 2018
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamically updating hardware prefetch trait to exclusive or shared...
- Patent number 9,891,916
- Issue date Feb 13, 2018
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple data prefetchers that defer to one another based on prefet...
- Patent number 9,817,764
- Issue date Nov 14, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Set associative cache memory with heterogeneous replacement policy
- Patent number 9,811,468
- Issue date Nov 7, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache replacement policy that considers memory access type
- Patent number 9,652,398
- Issue date May 16, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fully associative cache memory budgeted by memory access type
- Patent number 9,652,400
- Issue date May 16, 2017
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Selective accumulation and use of predicting unit history
- Patent number 9,507,597
- Issue date Nov 29, 2016
- VIA ALLIANCE SEMICONDUCTOR CO., LTD.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating prefetchers that throttle one another
- Patent number 9,483,406
- Issue date Nov 1, 2016
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Communicating prefetchers in a microprocessor
- Patent number 9,251,083
- Issue date Feb 2, 2016
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data prefetcher with complex stride predictor
- Patent number 9,032,159
- Issue date May 12, 2015
- Via Technologies, Inc.
- Meera Ramani-Augustin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounding box prefetcher
- Patent number 8,880,807
- Issue date Nov 4, 2014
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounding box prefetcher
- Patent number 8,762,649
- Issue date Jun 24, 2014
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounding box prefetcher with reduced warm-up penalty on memory bloc...
- Patent number 8,719,510
- Issue date May 6, 2014
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bounding box prefetcher
- Patent number 8,656,111
- Issue date Feb 18, 2014
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined L2 cache and L1D cache prefetcher
- Patent number 8,645,631
- Issue date Feb 4, 2014
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microprocessor with repeat prefetch indirect instruction
- Patent number 8,364,902
- Issue date Jan 29, 2013
- Via Technologies, Inc.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE
- Publication number 20170315921
- Publication date Nov 2, 2017
- VIA ALLIANCE SEMICODUCTOR CO., LTD.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...
- Publication number 20170123985
- Publication date May 4, 2017
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY
- Publication number 20160357680
- Publication date Dec 8, 2016
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...
- Publication number 20160357677
- Publication date Dec 8, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE
- Publication number 20160350228
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY BUDGETED BY CHUNKS BASED ON MEMORY ACCESS TYPE
- Publication number 20160350227
- Publication date Dec 1, 2016
- VIA Alliance Semiconductor Co., Ltd.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FULLY ASSOCIATIVE CACHE MEMORY BUDGETED BY MEMORY ACCESS TYPE
- Publication number 20160196214
- Publication date Jul 7, 2016
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY UPDATING HARDWARE PREFETCH TRAIT TO EXCLUSIVE OR SHARED...
- Publication number 20160110194
- Publication date Apr 21, 2016
- VIA TECHNOLOGIES, INC.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMICALLY UPDATING HARDWARE PREFETCH TRAIT TO EXCLUSIVE OR SHARED...
- Publication number 20160110289
- Publication date Apr 21, 2016
- VIA TECHNOLOGIES, INC.
- RODNEY E. HOOKER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE ACCUMULATION AND USE OF PREDICTING UNIT HISTORY
- Publication number 20140365753
- Publication date Dec 11, 2014
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATING PREFETCHERS THAT THROTTLE ONE ANOTHER
- Publication number 20140310479
- Publication date Oct 16, 2014
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOUNDING BOX PREFETCHER
- Publication number 20140289479
- Publication date Sep 25, 2014
- VIA TECHNOLOGIES, INC.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMMUNICATING PREFETCHERS IN A MICROPROCESSOR
- Publication number 20140258641
- Publication date Sep 11, 2014
- VIA TECHNOLOGIES, INC.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHER WITH COMPLEX STRIDE PREDICTOR
- Publication number 20140006718
- Publication date Jan 2, 2014
- VIA TECHNOLOGIES, INC.
- Meera Ramani-Augustin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOUNDING BOX PREFETCHER WITH REDUCED WARM-UP PENALTY ON MEMORY BLOC...
- Publication number 20110238920
- Publication date Sep 29, 2011
- VIA TECHNOLOGIES, INC.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOUNDING BOX PREFETCHER
- Publication number 20110238922
- Publication date Sep 29, 2011
- VIA TECHNOLOGIES, INC.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMBINED L2 CACHE AND L1D CACHE PREFETCHER
- Publication number 20110238923
- Publication date Sep 29, 2011
- VIA TECHNOLOGIES, INC.
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MICROPROCESSOR WITH REPEAT PREFETCH INDIRECT INSTRUCTION
- Publication number 20110035551
- Publication date Feb 10, 2011
- Rodney E. Hooker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA PREFETCHER WITH MULTI-LEVEL TABLE FOR PREDICTING STRIDE PATTERNS
- Publication number 20110010506
- Publication date Jan 13, 2011
- VIA Technologies, Inc.
- John Michael Greer
- G06 - COMPUTING CALCULATING COUNTING

John Michael Greer

Person

Patents Grantslast 30 patents

Dynamically updating hardware prefetch trait to exclusive or shared...

Cache memory budgeted by ways based on memory access type

Cache memory budgeted by chunks based on memory access type

Dynamically updating hardware prefetch trait to exclusive or shared...

Multiple data prefetchers that defer to one another based on prefet...

Set associative cache memory with heterogeneous replacement policy

Cache replacement policy that considers memory access type

Fully associative cache memory budgeted by memory access type

Selective accumulation and use of predicting unit history

Communicating prefetchers that throttle one another

Communicating prefetchers in a microprocessor

Data prefetcher with complex stride predictor

Bounding box prefetcher

Bounding box prefetcher

Bounding box prefetcher with reduced warm-up penalty on memory bloc...

Bounding box prefetcher

Combined L2 cache and L1D cache prefetcher

Microprocessor with repeat prefetch indirect instruction

Patents Applicationslast 30 patents

CACHE MEMORY BUDGETED BY WAYS BASED ON MEMORY ACCESS TYPE

PREFETCHING WITH LEVEL OF AGGRESSIVENESS BASED ON EFFECTIVENESS BY...

SET ASSOCIATIVE CACHE MEMORY WITH HETEROGENEOUS REPLACEMENT POLICY

MULTIPLE DATA PREFETCHERS THAT DEFER TO ONE ANOTHER BASED ON PREFET...

CACHE REPLACEMENT POLICY THAT CONSIDERS MEMORY ACCESS TYPE

CACHE MEMORY BUDGETED BY CHUNKS BASED ON MEMORY ACCESS TYPE

FULLY ASSOCIATIVE CACHE MEMORY BUDGETED BY MEMORY ACCESS TYPE

DYNAMICALLY UPDATING HARDWARE PREFETCH TRAIT TO EXCLUSIVE OR SHARED...

DYNAMICALLY UPDATING HARDWARE PREFETCH TRAIT TO EXCLUSIVE OR SHARED...

SELECTIVE ACCUMULATION AND USE OF PREDICTING UNIT HISTORY

COMMUNICATING PREFETCHERS THAT THROTTLE ONE ANOTHER

BOUNDING BOX PREFETCHER

COMMUNICATING PREFETCHERS IN A MICROPROCESSOR

DATA PREFETCHER WITH COMPLEX STRIDE PREDICTOR

BOUNDING BOX PREFETCHER WITH REDUCED WARM-UP PENALTY ON MEMORY BLOC...

BOUNDING BOX PREFETCHER

COMBINED L2 CACHE AND L1D CACHE PREFETCHER

MICROPROCESSOR WITH REPEAT PREFETCH INDIRECT INSTRUCTION

DATA PREFETCHER WITH MULTI-LEVEL TABLE FOR PREDICTING STRIDE PATTERNS