John P. Erdeljac

Person

Plano, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Deep trench with self-aligned sinker
- Patent number 9,431,286
- Issue date Aug 30, 2016
- Texas Instruments Incorporated
- Sameer P Pendharkar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with bonding layer over active circuitry
- Patent number 6,683,380
- Issue date Jan 27, 2004
- Texas Instruments Incorporated
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Tunnel diode layout for an EEPROM cell for protecting the tunnel di...
- Patent number 6,534,364
- Issue date Mar 18, 2003
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
LDMOS power device with oversized dwell
- Patent number 6,424,005
- Issue date Jul 23, 2002
- Texas Instruments Incorporated
- Chin-Yu Tsai
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Power transistor with silicided gate and contacts
- Patent number 6,284,669
- Issue date Sep 4, 2001
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metalization outside protective overcoat for improved capacitors an...
- Patent number 6,284,617
- Issue date Sep 4, 2001
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization outside protective overcoat for improved capacitors a...
- Patent number 6,236,101
- Issue date May 22, 2001
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor with increased operating voltage and method of fabrication
- Patent number 6,153,451
- Issue date Nov 28, 2000
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit with bonding layer over active circuitry
- Patent number 6,144,100
- Issue date Nov 7, 2000
- Texas Instruments Incorporated
- Chi-Cheong Shen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self aligned DMOS transistor and method of fabrication
- Patent number 6,025,231
- Issue date Feb 15, 2000
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low voltage DMOS transistor
- Patent number 5,825,065
- Issue date Oct 20, 1998
- Texas Instruments Incorporated
- Marco Corsi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
DMOS transistor with low on-resistance and method of fabrication
- Patent number 5,719,421
- Issue date Feb 17, 1998
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making an EEPROM with thermal oxide isolated floating gate
- Patent number 5,576,233
- Issue date Nov 19, 1996
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having polysilicon resistor with low temperatu...
- Patent number 5,554,873
- Issue date Sep 10, 1996
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating semiconductor device having polysilicon resis...
- Patent number 5,489,547
- Issue date Feb 6, 1996
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor process for manufacturing semiconductor devices with...
- Patent number 5,436,179
- Issue date Jul 25, 1995
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor process for manufacturing semiconductor device with i...
- Patent number 5,408,125
- Issue date Apr 18, 1995
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor process for manufacturing semiconductor devices with...
- Patent number 5,330,922
- Issue date Jul 19, 1994
- Texas Instruments Incorporated
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical DMOS transistor built in an n-well MOS-based BiCMOS process
- Patent number 5,317,180
- Issue date May 31, 1994
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical DMOS transistor structure built in an N-well CMOS-based Bi...
- Patent number 5,171,699
- Issue date Dec 15, 1992
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High voltage merged bipolar/CMOS technology
- Patent number 4,994,887
- Issue date Feb 19, 1991
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High voltage capacitor for integrated circuits
- Patent number 4,805,071
- Issue date Feb 14, 1989
- Texas Instruments Incorporated
- Louis N. Hutter
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Integrated circuit with bonding layer over active circuitry
- Publication number 20030036256
- Publication date Feb 20, 2003
- Taylor R. Efland
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Metallization outside protective overcoat for improved capacitors a...
- Publication number 20010019865
- Publication date Sep 6, 2001
- John P. Erdeljac
- H01 - BASIC ELECTRIC ELEMENTS

John P. Erdeljac

Person

Patents Grantslast 30 patents

Deep trench with self-aligned sinker

Integrated circuit with bonding layer over active circuitry

Tunnel diode layout for an EEPROM cell for protecting the tunnel di...

LDMOS power device with oversized dwell

Power transistor with silicided gate and contacts

Metalization outside protective overcoat for improved capacitors an...

Metallization outside protective overcoat for improved capacitors a...

Transistor with increased operating voltage and method of fabrication

Integrated circuit with bonding layer over active circuitry

Self aligned DMOS transistor and method of fabrication

Low voltage DMOS transistor

DMOS transistor with low on-resistance and method of fabrication

Method for making an EEPROM with thermal oxide isolated floating gate

Semiconductor device having polysilicon resistor with low temperatu...

Method of fabricating semiconductor device having polysilicon resis...

Semiconductor process for manufacturing semiconductor devices with...

Semiconductor process for manufacturing semiconductor device with i...

Semiconductor process for manufacturing semiconductor devices with...

Vertical DMOS transistor built in an n-well MOS-based BiCMOS process

Vertical DMOS transistor structure built in an N-well CMOS-based Bi...

High voltage merged bipolar/CMOS technology

High voltage capacitor for integrated circuits

Patents Applicationslast 30 patents

Integrated circuit with bonding layer over active circuitry

Metallization outside protective overcoat for improved capacitors a...