Johnny A. Lam

Person

Firestone, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Single-level cell block storing data for migration to multiple mult...
- Patent number 11,995,328
- Issue date May 28, 2024
- Micron Technology, Inc.
- Johnny Au Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual management unit scheme for two-pass programming in a memory...
- Patent number 11,922,011
- Issue date Mar 5, 2024
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Just-in-time (JIT) scheduler for memory subsystems
- Patent number 11,868,287
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Johnny A Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Background memory scan block selection
- Patent number 11,868,643
- Issue date Jan 9, 2024
- Micron Technology, Inc.
- Alex J. Wesenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Journal scheme for two-pass programming memory devices
- Patent number 11,714,562
- Issue date Aug 1, 2023
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct cache hit and transfer in a memory sub-system that programs...
- Patent number 11,681,629
- Issue date Jun 20, 2023
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical-to-physical mapping of data groups with data locality
- Patent number 11,640,354
- Issue date May 2, 2023
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error handling optimization in memory sub-system mapping
- Patent number 11,561,855
- Issue date Jan 24, 2023
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous power loss recovery for memory devices
- Patent number 11,537,512
- Issue date Dec 27, 2022
- Micron Technology, Inc.
- Michael Winterfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling asynchronous power loss in a memory sub-system that progra...
- Patent number 11,461,233
- Issue date Oct 4, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Direct cache hit and transfer in a memory sub-system that programs...
- Patent number 11,347,648
- Issue date May 31, 2022
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerated read translation path in memory sub-system
- Patent number 11,314,446
- Issue date Apr 26, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logical-to-physical mapping of data groups with data locality
- Patent number 11,249,896
- Issue date Feb 15, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequential read optimization in a memory sub-system that programs s...
- Patent number 11,216,364
- Issue date Jan 4, 2022
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error handling optimization in memory sub-system mapping
- Patent number 11,210,168
- Issue date Dec 28, 2021
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous power loss recovery for memory devices
- Patent number 11,194,709
- Issue date Dec 7, 2021
- Micron Technology, Inc.
- Michael Winterfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Handling asynchronous power loss in a memory sub-system that progra...
- Patent number 10,990,526
- Issue date Apr 27, 2021
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Window based mapping
- Patent number 10,459,635
- Issue date Oct 29, 2019
- SK Hynix Inc.
- Matthew Lewis Call
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system and method for accelerating boot time
- Patent number 10,169,289
- Issue date Jan 1, 2019
- SK Hynix Inc.
- David Pignatelli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial garbage collection for fast error handling and optimized ga...
- Patent number 10,061,696
- Issue date Aug 28, 2018
- Western Digital Technologies, Inc.
- Justin Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for dynamically adjusting garbage collection poli...
- Patent number 9,678,671
- Issue date Jun 13, 2017
- Western Digital Technologies, Inc.
- Ho-Fan Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient error handling mechanisms in data storage systems
- Patent number 9,626,118
- Issue date Apr 18, 2017
- Western Digital Technologies, Inc.
- Johnny A. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
Partial garbage collection for fast error handling and optimized ga...
- Patent number 9,354,955
- Issue date May 31, 2016
- Western Digital Technologies, Inc.
- Justin Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient error handling mechanisms in data storage systems
- Patent number 9,208,020
- Issue date Dec 8, 2015
- Western Digital Technologies, Inc.
- Johnny A. Lam
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for dynamically adjusting garbage collection poli...
- Patent number 9,158,670
- Issue date Oct 13, 2015
- Western Digital Technologies, Inc.
- Ho-Fan Kang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power fail protection and recovery using low power states in a data...
- Patent number 9,042,197
- Issue date May 26, 2015
- Western Digital Technologies, Inc.
- Michael S. Allison
- G11 - INFORMATION STORAGE
Information Patent Grant
Mechanisms for efficient management of system data in data storage...
- Patent number 8,954,653
- Issue date Feb 10, 2015
- Western Digital Technologies, Inc.
- Jerry Lo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient error handling mechanisms in data storage systems
- Patent number 8,924,832
- Issue date Dec 30, 2014
- Western Digital Technologies, Inc.
- Johnny A. Lam
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
SINGLE-LEVEL CELL BLOCK STORING DATA FOR MIGRATION TO MULTIPLE MULT...
- Publication number 20240302985
- Publication date Sep 12, 2024
- Micron Technology, Inc.
- Johnny Au LAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS
- Publication number 20240078199
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACKGROUND MEMORY SCAN BLOCK SELECTION
- Publication number 20240078033
- Publication date Mar 7, 2024
- Micron Technology, Inc.
- Alex J. Wesenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SINGLE-LEVEL CELL BLOCK STORING DATA FOR MIGRATION TO MULTIPLE MULT...
- Publication number 20240061597
- Publication date Feb 22, 2024
- Micron Technology, Inc.
- Johnny Au LAM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...
- Publication number 20230061180
- Publication date Mar 2, 2023
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT CACHE HIT AND TRANSFER IN A MEMORY SUB-SYSTEM THAT PROGRAMS...
- Publication number 20220269611
- Publication date Aug 25, 2022
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM
- Publication number 20220214830
- Publication date Jul 7, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
QOS TRAFFIC CLASS LATENCY MODEL FOR JUST-IN-TIME (JIT) SCHEDULERS
- Publication number 20220197563
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS
- Publication number 20220197837
- Publication date Jun 23, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BACKGROUND MEMORY SCAN BLOCK SELECTION
- Publication number 20220188009
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Alex J. Wesenberg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JOURNAL SCHEME FOR TWO-PASS PROGRAMMING MEMORY DEVICES
- Publication number 20220187999
- Publication date Jun 16, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY
- Publication number 20220129376
- Publication date Apr 28, 2022
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR HANDLING OPTIMIZATION IN MEMORY SUB-SYSTEM MAPPING
- Publication number 20220075690
- Publication date Mar 10, 2022
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS POWER LOSS RECOVERY FOR MEMORY DEVICES
- Publication number 20220043746
- Publication date Feb 10, 2022
- Micron Technology, Inc.
- Michael Winterfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT CACHE HIT AND TRANSFER IN A MEMORY SUB-SYSTEM THAT PROGRAMS...
- Publication number 20210406185
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM
- Publication number 20210405914
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ERROR HANDLING OPTIMIZATION IN MEMORY SUB-SYSTEM MAPPING
- Publication number 20210406117
- Publication date Dec 30, 2021
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HANDLING ASYNCHRONOUS POWER LOSS IN A MEMORY SUB-SYSTEM THAT PROGRA...
- Publication number 20210342267
- Publication date Nov 4, 2021
- Micron Technology, Inc.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL READ OPTIMIZATION IN A MEMORY SUB-SYSTEM THAT PROGRAMS S...
- Publication number 20210255949
- Publication date Aug 19, 2021
- Micron Technology, Inc.
- Chandra M. Guda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS POWER LOSS RECOVERY FOR MEMORY DEVICES
- Publication number 20210200670
- Publication date Jul 1, 2021
- Micron Technology, Inc.
- Michael Winterfeld
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY
- Publication number 20210191850
- Publication date Jun 24, 2021
- Micron Technology, Inc.
- Sanjay Subbarao
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SYSTEM AND METHOD FOR ACCELERATING BOOT TIME
- Publication number 20170371834
- Publication date Dec 28, 2017
- SK HYNIX MEMORY SOLUTIONS INC.
- David PIGNATELLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WINDOW BASED MAPPING
- Publication number 20170235488
- Publication date Aug 17, 2017
- SK HYNIX INC.
- Matthew Lewis Call
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTIAL GARBAGE COLLECTION FOR FAST ERROR HANDLING AND OPTIMIZED GA...
- Publication number 20160275012
- Publication date Sep 22, 2016
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Justin JONES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR DYNAMICALLY ADJUSTING GARBAGE COLLECTION POLI...
- Publication number 20160103617
- Publication date Apr 14, 2016
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Ho-Fan KANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT ERROR HANDLING MECHANISMS IN DATA STORAGE SYSTEMS
- Publication number 20160085470
- Publication date Mar 24, 2016
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT ERROR HANDLING MECHANISMS IN DATA STORAGE SYSTEMS
- Publication number 20150121165
- Publication date Apr 30, 2015
- WESTERN DIGITAL TECHNOLOGIES, INC.
- Johnny A. Lam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER FAIL PROTECTION AND RECOVERY USING LOW POWER STATES IN A DATA...
- Publication number 20150029808
- Publication date Jan 29, 2015
- WESTERN DIGITAL TECHNOLOGIES, INC.
- MICHAEL S. ALLISON
- G11 - INFORMATION STORAGE

Johnny A. Lam

Person

Patents Grantslast 30 patents

Single-level cell block storing data for migration to multiple mult...

Virtual management unit scheme for two-pass programming in a memory...

Just-in-time (JIT) scheduler for memory subsystems

Background memory scan block selection

Journal scheme for two-pass programming memory devices

Direct cache hit and transfer in a memory sub-system that programs...

Logical-to-physical mapping of data groups with data locality

Error handling optimization in memory sub-system mapping

Asynchronous power loss recovery for memory devices

Handling asynchronous power loss in a memory sub-system that progra...

Direct cache hit and transfer in a memory sub-system that programs...

Accelerated read translation path in memory sub-system

Logical-to-physical mapping of data groups with data locality

Sequential read optimization in a memory sub-system that programs s...

Error handling optimization in memory sub-system mapping

Asynchronous power loss recovery for memory devices

Handling asynchronous power loss in a memory sub-system that progra...

Window based mapping

Memory system and method for accelerating boot time

Partial garbage collection for fast error handling and optimized ga...

System and method for dynamically adjusting garbage collection poli...

Efficient error handling mechanisms in data storage systems

Partial garbage collection for fast error handling and optimized ga...

Efficient error handling mechanisms in data storage systems

System and method for dynamically adjusting garbage collection poli...

Power fail protection and recovery using low power states in a data...

Mechanisms for efficient management of system data in data storage...

Efficient error handling mechanisms in data storage systems

Patents Applicationslast 30 patents

SINGLE-LEVEL CELL BLOCK STORING DATA FOR MIGRATION TO MULTIPLE MULT...

JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS

BACKGROUND MEMORY SCAN BLOCK SELECTION

SINGLE-LEVEL CELL BLOCK STORING DATA FOR MIGRATION TO MULTIPLE MULT...

VIRTUAL MANAGEMENT UNIT SCHEME FOR TWO-PASS PROGRAMMING IN A MEMORY...

DIRECT CACHE HIT AND TRANSFER IN A MEMORY SUB-SYSTEM THAT PROGRAMS...

ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM

QOS TRAFFIC CLASS LATENCY MODEL FOR JUST-IN-TIME (JIT) SCHEDULERS

JUST-IN-TIME (JIT) SCHEDULER FOR MEMORY SUBSYSTEMS

BACKGROUND MEMORY SCAN BLOCK SELECTION

JOURNAL SCHEME FOR TWO-PASS PROGRAMMING MEMORY DEVICES

LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY

ERROR HANDLING OPTIMIZATION IN MEMORY SUB-SYSTEM MAPPING

ASYNCHRONOUS POWER LOSS RECOVERY FOR MEMORY DEVICES

DIRECT CACHE HIT AND TRANSFER IN A MEMORY SUB-SYSTEM THAT PROGRAMS...

ACCELERATED READ TRANSLATION PATH IN MEMORY SUB-SYSTEM

ERROR HANDLING OPTIMIZATION IN MEMORY SUB-SYSTEM MAPPING

HANDLING ASYNCHRONOUS POWER LOSS IN A MEMORY SUB-SYSTEM THAT PROGRA...

SEQUENTIAL READ OPTIMIZATION IN A MEMORY SUB-SYSTEM THAT PROGRAMS S...

ASYNCHRONOUS POWER LOSS RECOVERY FOR MEMORY DEVICES

LOGICAL-TO-PHYSICAL MAPPING OF DATA GROUPS WITH DATA LOCALITY

MEMORY SYSTEM AND METHOD FOR ACCELERATING BOOT TIME

WINDOW BASED MAPPING

PARTIAL GARBAGE COLLECTION FOR FAST ERROR HANDLING AND OPTIMIZED GA...

SYSTEM AND METHOD FOR DYNAMICALLY ADJUSTING GARBAGE COLLECTION POLI...

EFFICIENT ERROR HANDLING MECHANISMS IN DATA STORAGE SYSTEMS

EFFICIENT ERROR HANDLING MECHANISMS IN DATA STORAGE SYSTEMS

POWER FAIL PROTECTION AND RECOVERY USING LOW POWER STATES IN A DATA...