Jonathan A. Schmitt

Person

Eden Prairie, MN, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-volatile memory cell having multiple signal pathways to provide...
- Patent number 10,109,364
- Issue date Oct 23, 2018
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Jonathan A. Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential bit cell
- Patent number 9,218,877
- Issue date Dec 22, 2015
- Broadcom Corporation
- Owen Hynes
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for split threshold voltage programmable bitcells
- Patent number 9,214,466
- Issue date Dec 15, 2015
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
One-time programmable memory cell
- Patent number 9,136,217
- Issue date Sep 15, 2015
- Broadcom Corporation
- Jonathan Schmitt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and system for split threshold voltage programmable bitcells
- Patent number 8,724,419
- Issue date May 13, 2014
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for split threshold voltage programmable bitcells
- Patent number 8,509,023
- Issue date Aug 13, 2013
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay locked loop having internal test path
- Patent number 8,405,435
- Issue date Mar 26, 2013
- LSI Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
One time programmable memory
- Patent number 8,159,894
- Issue date Apr 17, 2012
- Broadcom Corporation
- Jonathan A. Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for split threshold voltage programmable bitcells
- Patent number 8,159,895
- Issue date Apr 17, 2012
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device using antifuses
- Patent number 8,089,821
- Issue date Jan 3, 2012
- Broadcom Corporation
- Jonathan Alois Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Quad SRAM based one time programmable memory
- Patent number 8,040,748
- Issue date Oct 18, 2011
- Broadcom Corporation
- Myron Buer
- G11 - INFORMATION STORAGE
Information Patent Grant
One-time programmable memory cell
- Patent number 8,031,506
- Issue date Oct 4, 2011
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable memory cell
- Patent number 7,796,418
- Issue date Sep 14, 2010
- Broadcom Corporation
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Differential latch-based one time programmable memory
- Patent number 7,715,265
- Issue date May 11, 2010
- Broadcom Corporation
- Myron Buer
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device using antifuses
- Patent number 7,649,798
- Issue date Jan 19, 2010
- Broadcom Corporation
- Jonathan Alois Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Quad SRAM based one time programmable memory
- Patent number 7,609,578
- Issue date Oct 27, 2009
- Broadcom Corporation
- Myron Buer
- G11 - INFORMATION STORAGE
Information Patent Grant
At-speed on-chip short clock cycle monitoring system and method
- Patent number 7,129,690
- Issue date Oct 31, 2006
- LSI Logic Corporation
- Jonathan Schmitt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal programmable phase-locked loop
- Patent number 7,002,419
- Issue date Feb 21, 2006
- LSI Logic Corporation
- Jonathan A. Schmitt
- G11 - INFORMATION STORAGE
Information Patent Grant
Power sequence protection for a level shifter
- Patent number 6,785,107
- Issue date Aug 31, 2004
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Supply variation tolerant VCO
- Patent number 6,756,853
- Issue date Jun 29, 2004
- LSI Logic Corporation
- Jonathan A. Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control circuit for power
- Patent number 6,621,299
- Issue date Sep 16, 2003
- LSI Logic Corporation
- Todd A. Randazzo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit I/O buffer with series P-channel and floating well
- Patent number 6,300,800
- Issue date Oct 9, 2001
- LSI Logic Corporation
- Jonathan A. Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage tolerant oscillator input cell
- Patent number 6,181,214
- Issue date Jan 30, 2001
- LSI Logic Corporation
- Jonathan A. Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit I/O buffer with 5V well and passive gate voltage
- Patent number 6,130,556
- Issue date Oct 10, 2000
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit I/O buffer having pass gate protection with RC d...
- Patent number 6,118,303
- Issue date Sep 12, 2000
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit I/O buffer having pull-up to voltages greater th...
- Patent number 6,028,449
- Issue date Feb 22, 2000
- LSI Logic Corporation
- Jonathan Schmitt
- G05 - CONTROLLING REGULATING
Information Patent Grant
5V tolerant PCI I/O buffer on 2.5V technology
- Patent number 6,005,413
- Issue date Dec 21, 1999
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High density gate array cell architecture with sharing of well taps...
- Patent number 5,977,574
- Issue date Nov 2, 1999
- LSI Logic Corporation
- Jonathan Schmitt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Output buffer with regulated voltage biasing for driving voltages g...
- Patent number 5,966,030
- Issue date Oct 12, 1999
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Chip level bias for buffers driving voltages greater than transisto...
- Patent number 5,963,057
- Issue date Oct 5, 1999
- LSI Logic Corporation
- Jonathan Schmitt
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
NON-VOLATILE MEMORY CELL HAVING MULRTIPLE SIGNAL PATHWAYS TO PROVID...
- Publication number 20170117058
- Publication date Apr 27, 2017
- BROADCOM CORPORATION
- Jonathan A. Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL BIT CELL
- Publication number 20140376300
- Publication date Dec 25, 2014
- Owen Hynes
- G11 - INFORMATION STORAGE
Information Patent Application
Method and System for Split Threshold Voltage Programmable Bitcells
- Publication number 20140183656
- Publication date Jul 3, 2014
- BROADCOM CORPORATION
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
One-Time Programmable Memory Cell
- Publication number 20140071731
- Publication date Mar 13, 2014
- BROADCOM CORPORATION
- Jonathan Schmitt
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and System for Split Threshold Voltage Programmable Bitcells
- Publication number 20130307116
- Publication date Nov 21, 2013
- BROADCOM CORPORATION
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
Method and System for Split Threshold Voltage Programmable Bitcells
- Publication number 20120195091
- Publication date Aug 2, 2012
- BROADCOM CORPORATION
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM FOR SPLIT THRESHOLD VOLTAGE PROGRAMMABLE BITCELLS
- Publication number 20110255327
- Publication date Oct 20, 2011
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE USING ANTIFUSES
- Publication number 20100118584
- Publication date May 13, 2010
- Jonathan Alois Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
Quad SRAM Based One Time Programmable Memory
- Publication number 20100014340
- Publication date Jan 21, 2010
- BROADCOM CORPORATION
- Myron BUER
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable memory cell
- Publication number 20090237974
- Publication date Sep 24, 2009
- BROADCOM CORPORATION
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
One-time programmable memory cell
- Publication number 20090237975
- Publication date Sep 24, 2009
- BROADCOM CORPORATION
- Jonathan Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
Differential Latch-Based One Time Programmable Memory
- Publication number 20090109724
- Publication date Apr 30, 2009
- BROADCOM CORPORATION
- Myron BUER
- G11 - INFORMATION STORAGE
Information Patent Application
Quad SRAM Based One Time Programmable Memory
- Publication number 20090109723
- Publication date Apr 30, 2009
- BROADCOM CORPORATION
- Myron BUER
- G11 - INFORMATION STORAGE
Information Patent Application
One time programmable memory
- Publication number 20090059645
- Publication date Mar 5, 2009
- BROADCOM CORPORATION
- Jonathan A. Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device using antifuses
- Publication number 20080043509
- Publication date Feb 21, 2008
- Jonathan Alois Schmitt
- G11 - INFORMATION STORAGE
Information Patent Application
Delay locked loop having internal test path
- Publication number 20060097763
- Publication date May 11, 2006
- LSI Logic Corporation
- Jonathan Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Metal programmable phase-locked loop
- Publication number 20050057975
- Publication date Mar 17, 2005
- LSI Logic Corporation
- Jonathan A. Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Supply variation tolerant VCO
- Publication number 20030227333
- Publication date Dec 11, 2003
- LSI Logic Corporation
- Jonathan A. Schmitt
- H03 - BASIC ELECTRONIC CIRCUITRY

Jonathan A. Schmitt

Person

Patents Grantslast 30 patents

Non-volatile memory cell having multiple signal pathways to provide...

Differential bit cell

Method and system for split threshold voltage programmable bitcells

One-time programmable memory cell

Method and system for split threshold voltage programmable bitcells

Method and system for split threshold voltage programmable bitcells

Delay locked loop having internal test path

One time programmable memory

Method and system for split threshold voltage programmable bitcells

Memory device using antifuses

Quad SRAM based one time programmable memory

One-time programmable memory cell

Programmable memory cell

Differential latch-based one time programmable memory

Memory device using antifuses

Quad SRAM based one time programmable memory

At-speed on-chip short clock cycle monitoring system and method

Metal programmable phase-locked loop

Power sequence protection for a level shifter

Supply variation tolerant VCO

Control circuit for power

Integrated circuit I/O buffer with series P-channel and floating well

Voltage tolerant oscillator input cell

Integrated circuit I/O buffer with 5V well and passive gate voltage

Integrated circuit I/O buffer having pass gate protection with RC d...

Integrated circuit I/O buffer having pull-up to voltages greater th...

5V tolerant PCI I/O buffer on 2.5V technology

High density gate array cell architecture with sharing of well taps...

Output buffer with regulated voltage biasing for driving voltages g...

Chip level bias for buffers driving voltages greater than transisto...

Patents Applicationslast 30 patents

NON-VOLATILE MEMORY CELL HAVING MULRTIPLE SIGNAL PATHWAYS TO PROVID...

DIFFERENTIAL BIT CELL

Method and System for Split Threshold Voltage Programmable Bitcells

One-Time Programmable Memory Cell

Method and System for Split Threshold Voltage Programmable Bitcells

Method and System for Split Threshold Voltage Programmable Bitcells

METHOD AND SYSTEM FOR SPLIT THRESHOLD VOLTAGE PROGRAMMABLE BITCELLS

MEMORY DEVICE USING ANTIFUSES

Quad SRAM Based One Time Programmable Memory

Programmable memory cell

One-time programmable memory cell

Differential Latch-Based One Time Programmable Memory

Quad SRAM Based One Time Programmable Memory

One time programmable memory

Memory device using antifuses

Delay locked loop having internal test path

Metal programmable phase-locked loop

Supply variation tolerant VCO