Jong Tae Kwak

Person

Kyoungki-Do, KR

People

Patents Grantslast 30 patents

Information Patent Grant
Register controlled delay locked loop and its control method
- Patent number RE43775
- Issue date Oct 30, 2012
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems
Information Patent Grant
Delay locked loop in semiconductor memory device
- Patent number 7,733,140
- Issue date Jun 8, 2010
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Control circuit for stable exit from power-down mode
- Patent number 7,518,940
- Issue date Apr 14, 2009
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital delay locked loop capable of correcting duty cycle and its...
- Patent number 7,385,428
- Issue date Jun 10, 2008
- Hynix Semiconductor, Inc.
- Hyun-Woo Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop in semiconductor memory device
- Patent number 7,375,565
- Issue date May 20, 2008
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop and clock generation method thereof
- Patent number 7,268,601
- Issue date Sep 11, 2007
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Refresh control circuit and method for multi-bank structure DRAM
- Patent number 7,260,010
- Issue date Aug 21, 2007
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital delay locked loop capable of correcting duty cycle and its...
- Patent number 7,161,397
- Issue date Jan 9, 2007
- Hynix Semiconductor Inc.
- Hyun-Woo Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Semiconductor memory device for reducing chip area
- Patent number 7,145,820
- Issue date Dec 5, 2006
- Hynix Semiconductor Inc.
- Seung-Wook Kwack
- G11 - INFORMATION STORAGE
Information Patent Grant
Refresh control circuit and method for multi-bank structure DRAM
- Patent number 7,145,827
- Issue date Dec 5, 2006
- Hynix Semiconductor, Inc.
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay locked loop and its control method for correcting a duty rati...
- Patent number 7,142,026
- Issue date Nov 28, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Control circuit for stable exit from power-down mode
- Patent number 7,130,237
- Issue date Oct 31, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay locked loop device
- Patent number 7,099,232
- Issue date Aug 29, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Register controlled delay locked loop and its control method
- Patent number 7,088,159
- Issue date Aug 8, 2006
- Hynix Semiconductor, Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Digital DLL apparatus for correcting duty cycle and method thereof
- Patent number 7,057,431
- Issue date Jun 6, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delayed locked loops and methods of driving the same
- Patent number 7,046,061
- Issue date May 16, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop and its control method
- Patent number 7,046,059
- Issue date May 16, 2006
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop device
- Patent number 6,956,418
- Issue date Oct 18, 2005
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Register controlled delay locked loop having an acceleration mode
- Patent number 6,853,226
- Issue date Feb 8, 2005
- Hynix Semiconductor, Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Delay locked loop and method of driving the same
- Patent number 6,825,703
- Issue date Nov 30, 2004
- Hynix Semiconductor Inc.
- Jong Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for outputting burst read data
- Patent number 6,775,201
- Issue date Aug 10, 2004
- Hynix Semiconductor Inc.
- Seong Hoon Lee
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock control circuit for Rambus DRAM
- Patent number 6,772,359
- Issue date Aug 3, 2004
- Hyundai Electronics Industries Co., Ltd.
- Jong Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock synchronization circuit
- Patent number 6,768,361
- Issue date Jul 27, 2004
- Hynix Semiconductor Inc.
- Jong Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Rambus DRAM with clock control circuitry that reduces power consump...
- Patent number 6,687,843
- Issue date Feb 3, 2004
- Hyundai Electronics Industries Co., Ltd.
- Jong Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital DLL apparatus for correcting duty cycle and method thereof
- Patent number 6,677,792
- Issue date Jan 13, 2004
- Hynix Semiconductor Inc.
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power type Rambus DRAM
- Patent number 6,646,939
- Issue date Nov 11, 2003
- Hynix Semiconductor Inc.
- Jong Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Clock synchronization circuit having improved jitter property
- Patent number 6,573,771
- Issue date Jun 3, 2003
- Hynix Semiconductor Inc.
- Seong-Hoon Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Controlling output current rambus DRAM
- Patent number 6,567,317
- Issue date May 20, 2003
- Hynix Semiconductor Inc.
- Jong Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Grant
Load signal generating circuit of a packet command driving type mem...
- Patent number 6,246,636
- Issue date Jun 12, 2001
- Hyundai Electronics Industries Co., Ltd.
- Kwang Jin Na
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Delay locked loop in semiconductor memory device
- Publication number 20080211555
- Publication date Sep 4, 2008
- Jong-Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital delay locked loop capable of correcting duty cycle and its...
- Publication number 20070103212
- Publication date May 10, 2007
- Hyun-Woo Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Refresh control circuit and method for multi-bank structure DRAM
- Publication number 20070070768
- Publication date Mar 29, 2007
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Application
Control circuit for stable exit from power-down mode
- Publication number 20070008789
- Publication date Jan 11, 2007
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor memory device for reducing chip area
- Publication number 20060133168
- Publication date Jun 22, 2006
- Hynix Semiconductor, Inc.
- Seung-Wook Kwack
- G11 - INFORMATION STORAGE
Information Patent Application
Register controlled delay locked loop and its control method
- Publication number 20060001465
- Publication date Jan 5, 2006
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital delay locked loop capable of correcting duty cycle and its...
- Publication number 20060001463
- Publication date Jan 5, 2006
- Hyun-Woo Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop device
- Publication number 20050249027
- Publication date Nov 10, 2005
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Refresh control circuit and method for multi-bank structure DRAM
- Publication number 20050237838
- Publication date Oct 27, 2005
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Application
Delay locked loop in semiconductor memory device
- Publication number 20050195663
- Publication date Sep 8, 2005
- Jong-Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control circuit for stable exit from power-down mode
- Publication number 20050141321
- Publication date Jun 30, 2005
- Jong-Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Application
Delayed locked loop in semiconductor memory device and its control...
- Publication number 20050122796
- Publication date Jun 9, 2005
- Hea-Suk Jung
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop and its control method
- Publication number 20050110540
- Publication date May 26, 2005
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delayed locked loops and methods of driving the same
- Publication number 20050093599
- Publication date May 5, 2005
- Jong Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop and its control method
- Publication number 20050093597
- Publication date May 5, 2005
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop and clock generation method thereof
- Publication number 20050093600
- Publication date May 5, 2005
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay locked loop device
- Publication number 20040217789
- Publication date Nov 4, 2004
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Register controlled delay locked loop having acceleration mode
- Publication number 20040085107
- Publication date May 6, 2004
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital DLL apparatus for correcting duty cycle and method thereof
- Publication number 20030219088
- Publication date Nov 27, 2003
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital DLL apparatus for correcting duty cycle and method thereof
- Publication number 20030218486
- Publication date Nov 27, 2003
- Jong-Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Clock synchronization circuit
- Publication number 20030117191
- Publication date Jun 26, 2003
- Jong Tae Kwak
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and apparatus for outputting burst read data
- Publication number 20030095442
- Publication date May 22, 2003
- Hynix Semiconductor Inc.
- Seong Hoon Lee
- G11 - INFORMATION STORAGE
Information Patent Application
Clock synchronization circuit
- Publication number 20030001635
- Publication date Jan 2, 2003
- Seong-Hoon Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Controlling output current in rambus DRAM
- Publication number 20020176309
- Publication date Nov 28, 2002
- Jong Tae Kwak
- G11 - INFORMATION STORAGE
Information Patent Application
Clock control circuit for rambus dram
- Publication number 20010042220
- Publication date Nov 15, 2001
- Jong Tae Kwak
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rambus dram
- Publication number 20010015934
- Publication date Aug 23, 2001
- Jong Tae Kwak
- G11 - INFORMATION STORAGE

Jong Tae Kwak

Person

Patents Grantslast 30 patents

Register controlled delay locked loop and its control method

Delay locked loop in semiconductor memory device

Control circuit for stable exit from power-down mode

Digital delay locked loop capable of correcting duty cycle and its...

Delay locked loop in semiconductor memory device

Delay locked loop and clock generation method thereof

Refresh control circuit and method for multi-bank structure DRAM

Digital delay locked loop capable of correcting duty cycle and its...

Semiconductor memory device for reducing chip area

Refresh control circuit and method for multi-bank structure DRAM

Delay locked loop and its control method for correcting a duty rati...

Control circuit for stable exit from power-down mode

Delay locked loop device

Register controlled delay locked loop and its control method

Digital DLL apparatus for correcting duty cycle and method thereof

Delayed locked loops and methods of driving the same

Delay locked loop and its control method

Delay locked loop device

Register controlled delay locked loop having an acceleration mode

Delay locked loop and method of driving the same

Method and apparatus for outputting burst read data

Clock control circuit for Rambus DRAM

Clock synchronization circuit

Rambus DRAM with clock control circuitry that reduces power consump...

Digital DLL apparatus for correcting duty cycle and method thereof

Low power type Rambus DRAM

Clock synchronization circuit having improved jitter property

Controlling output current rambus DRAM

Load signal generating circuit of a packet command driving type mem...

Patents Applicationslast 30 patents

Delay locked loop in semiconductor memory device

Digital delay locked loop capable of correcting duty cycle and its...

Refresh control circuit and method for multi-bank structure DRAM

Control circuit for stable exit from power-down mode

Semiconductor memory device for reducing chip area

Register controlled delay locked loop and its control method

Digital delay locked loop capable of correcting duty cycle and its...

Delay locked loop device

Refresh control circuit and method for multi-bank structure DRAM

Delay locked loop in semiconductor memory device

Control circuit for stable exit from power-down mode

Delayed locked loop in semiconductor memory device and its control...

Delay locked loop and its control method

Delayed locked loops and methods of driving the same

Delay locked loop and its control method

Delay locked loop and clock generation method thereof

Delay locked loop device

Register controlled delay locked loop having acceleration mode

Digital DLL apparatus for correcting duty cycle and method thereof

Digital DLL apparatus for correcting duty cycle and method thereof

Clock synchronization circuit

Method and apparatus for outputting burst read data

Clock synchronization circuit

Controlling output current in rambus DRAM

Clock control circuit for rambus dram

Rambus dram