Jongheon Jeong

Person

Palo Alto, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Testing for shorts between internal nodes of a power distribution grid
- Patent number 9,453,870
- Issue date Sep 27, 2016
- Xilinx, Inc.
- Amitava Majumdar
- G01 - MEASURING TESTING
Information Patent Grant
Methods of making integrated circuit products
- Patent number 9,012,245
- Issue date Apr 21, 2015
- Xilinx, Inc.
- Matthew H. Klein
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for self-regulated burn-in of an integrated ci...
- Patent number 8,212,576
- Issue date Jul 3, 2012
- Xilinx, Inc.
- Jae Cho
- G01 - MEASURING TESTING
Information Patent Grant
Three-terminal non-volatile memory element with hybrid gate dielectric
- Patent number 7,687,797
- Issue date Mar 30, 2010
- Xilinx, Inc.
- James Karp
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory cell with charge storage element and method of...
- Patent number 7,544,968
- Issue date Jun 9, 2009
- Xilinx, Inc.
- Shahin Toutounchi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PMOS three-terminal non-volatile memory element and method of progr...
- Patent number 7,450,431
- Issue date Nov 11, 2008
- Xilinx, Inc.
- James Karp
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of programming a three-terminal non-volatile memory element...
- Patent number 7,420,842
- Issue date Sep 2, 2008
- Xilinx, Inc.
- Michael G. Ahrens
- G11 - INFORMATION STORAGE
Information Patent Grant
Ballast resistor with reduced area for ESD protection
- Patent number 6,740,936
- Issue date May 25, 2004
- Xilinx, Inc.
- Daniel Gitlin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-volatile memory array using gate breakdown structures
- Patent number 6,549,458
- Issue date Apr 15, 2003
- Xilinx, Inc.
- Kameswara K. Rao
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-volatile memory array using gate breakdown structures
- Patent number 6,522,582
- Issue date Feb 18, 2003
- Xilinx, Inc.
- Kameswara K. Rao
- G11 - INFORMATION STORAGE

Jongheon Jeong

Person

Patents Grantslast 30 patents

Testing for shorts between internal nodes of a power distribution grid

Methods of making integrated circuit products

Method and apparatus for self-regulated burn-in of an integrated ci...

Three-terminal non-volatile memory element with hybrid gate dielectric

Non-volatile memory cell with charge storage element and method of...

PMOS three-terminal non-volatile memory element and method of progr...

Method of programming a three-terminal non-volatile memory element...

Ballast resistor with reduced area for ESD protection

Non-volatile memory array using gate breakdown structures

Non-volatile memory array using gate breakdown structures