Jongwook Kye

Person

Pleasanton, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods, apparatus and system for a passthrough-based architecture
- Patent number 10,559,503
- Issue date Feb 11, 2020
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of patterning variable width metallization lines
- Patent number 10,366,917
- Issue date Jul 30, 2019
- GLOBALFOUNDRIES Inc.
- Xuelian Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit structure including power rail and tapping wire...
- Patent number 10,347,546
- Issue date Jul 9, 2019
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Structure with local contact for shorting a gate electrode to a sou...
- Patent number 10,204,861
- Issue date Feb 12, 2019
- GLOBALFOUNDRIES Inc.
- Xuelian Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, apparatus, and system for two-dimensional power rail to ena...
- Patent number 10,147,714
- Issue date Dec 4, 2018
- GLOBALFOUNDRIES Inc.
- Yan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistor contacts self-aligned in two dimensions
- Patent number 10,056,373
- Issue date Aug 21, 2018
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods, apparatus and system for a passthrough-based architecture
- Patent number 9,818,651
- Issue date Nov 14, 2017
- GLOBALFOUNDRIES Inc.
- Guillaume Bouche
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of design rule checking of circuit designs
- Patent number 9,798,852
- Issue date Oct 24, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for improved standard cell design and...
- Patent number 9,727,685
- Issue date Aug 8, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of forming self aligned continuity blocks for mandrel and no...
- Patent number 9,679,809
- Issue date Jun 13, 2017
- GLOBALFOUNDRIES Inc.
- Jongwook Kye
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Transistor contacts self-aligned two dimensions
- Patent number 9,660,040
- Issue date May 23, 2017
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of generating circuit layouts that are to be manufactured u...
- Patent number 9,613,177
- Issue date Apr 4, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Methods of generating circuit layouts using self-alligned double pa...
- Patent number 9,582,629
- Issue date Feb 28, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Self-aligned double patterning process for metal routing
- Patent number 9,536,778
- Issue date Jan 3, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wide pin for improved circuit routing
- Patent number 9,536,035
- Issue date Jan 3, 2017
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for assisted metal routing
- Patent number 9,519,745
- Issue date Dec 13, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods to utilize merged spacers for use in fin generation in tape...
- Patent number 9,472,464
- Issue date Oct 18, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metal segments as landing pads and local interconnects in an IC device
- Patent number 9,466,604
- Issue date Oct 11, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Middle of-line architecture for dense library layout using M0 hand-...
- Patent number 9,437,588
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-aligned double patterning process for two dimensional patterns
- Patent number 9,437,481
- Issue date Sep 6, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
MOL architecture enabling ultra-regular cross couple
- Patent number 9,431,300
- Issue date Aug 30, 2016
- GLOBALFOUNDRIES Inc.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Color-insensitive rules for routing structures
- Patent number 9,400,863
- Issue date Jul 26, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mask-aware routing and resulting device
- Patent number 9,330,221
- Issue date May 3, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Utilization of block-mask and cut-mask for forming metal routing in...
- Patent number 9,324,722
- Issue date Apr 26, 2016
- GLOBALFOUNDRIES Inc.
- Youngtag Woo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for modified cell architecture and the resulti...
- Patent number 9,292,647
- Issue date Mar 22, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods of patterning line-type features using a multiple patternin...
- Patent number 9,287,131
- Issue date Mar 15, 2016
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for increasing the robustness of a double patterning router...
- Patent number 9,268,897
- Issue date Feb 23, 2016
- GLOBALFOUNDRIES, INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transistor contacts self-aligned in two dimensions
- Patent number 9,202,751
- Issue date Dec 1, 2015
- GLOBALFOUNDRIES Inc.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cross-coupling-based design using diffusion contact structures
- Patent number 9,159,724
- Issue date Oct 13, 2015
- GLOBALFOUNDRIES Inc.
- Yan Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Color-insensitive rules for routing structures
- Patent number 9,158,879
- Issue date Oct 13, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF PATTERNING VARIABLE WIDTH METALLIZATION LINES
- Publication number 20190206717
- Publication date Jul 4, 2019
- GLOBALFOUNDRIES INC.
- Xuelian Zhu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONTACTS FOR LOCAL CONNECTIONS
- Publication number 20180190588
- Publication date Jul 5, 2018
- GLOBALFOUNDRIES INC.
- Xuelian ZHU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURE INCLUDING POWER RAIL AND TAPPING WIRE...
- Publication number 20180182675
- Publication date Jun 28, 2018
- GLOBALFOUNDRIES INC.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR TWO-DIMENSIONAL POWER RAIL TO ENA...
- Publication number 20180102354
- Publication date Apr 12, 2018
- GLOBALFOUNDRIES INC.
- Yan Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE
- Publication number 20180033701
- Publication date Feb 1, 2018
- GLOBALFOUNDRIES INC.
- Guillaume Bouche
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDI...
- Publication number 20170323902
- Publication date Nov 9, 2017
- GLOBALFOUNDRIES INC.
- Jia Zeng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE
- Publication number 20170263506
- Publication date Sep 14, 2017
- GLOBALFOUNDRIES INC.
- Guillaume Bouche
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS
- Publication number 20170221886
- Publication date Aug 3, 2017
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF DESIGN RULE CHECKING OF CIRCUIT DESIGNS
- Publication number 20160378906
- Publication date Dec 29, 2016
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS, APPARATUS AND SYSTEM FOR FABRICATING FINFET DEVICES USING...
- Publication number 20160336183
- Publication date Nov 17, 2016
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR IMPROVED STANDARD CELL DESIGN AND...
- Publication number 20160335389
- Publication date Nov 17, 2016
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR METAL ROUTING
- Publication number 20160293478
- Publication date Oct 6, 2016
- GLOBALFOUNDRIES INC.
- Lei YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR TWO DIMENSIONAL PATTERNS
- Publication number 20160163584
- Publication date Jun 9, 2016
- GLOBALFOUNDRIES INC.
- Lei Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE
- Publication number 20160141291
- Publication date May 19, 2016
- GLOBALFOUNDRIES INC.
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR ASSISTED METAL ROUTING
- Publication number 20160117432
- Publication date Apr 28, 2016
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR CONTACTS SELF-ALIGNED TWO DIMENSIONS
- Publication number 20160049481
- Publication date Feb 18, 2016
- GLOBALFOUNDRIES INC.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MASK-AWARE ROUTING AND RESULTING DEVICE
- Publication number 20150339428
- Publication date Nov 26, 2015
- GLOBAL FOUNDRIES Inc.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIDE PIN FOR IMPROVED CIRCUIT ROUTING
- Publication number 20150331988
- Publication date Nov 19, 2015
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FORMING GATE TIE BETWEEN ABUTTING CELLS AND RESULTING DEVICE
- Publication number 20150311122
- Publication date Oct 29, 2015
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF GENERATING CIRCUIT LAYOUTS USING SELF-ALLIGNED DOUBLE PA...
- Publication number 20150286764
- Publication date Oct 8, 2015
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS
- Publication number 20150287636
- Publication date Oct 8, 2015
- GLOBALFOUNDRIES INC.
- Andy Chih-Hung Wei
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF PATTERNING LINE-TYPE FEATURES USING A MULTIPLE PATTERNIN...
- Publication number 20150243515
- Publication date Aug 27, 2015
- GLOBALFOUNDRIES Inc.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLOR-INSENSITIVE RULES FOR ROUTING STRUCTURES
- Publication number 20150220676
- Publication date Aug 6, 2015
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR MODIFIED CELL ARCHITECTURE AND THE RESULTI...
- Publication number 20150213184
- Publication date Jul 30, 2015
- GLOBALFOUNDRIES INC.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES
- Publication number 20150187702
- Publication date Jul 2, 2015
- GLOBALFOUNDRIES INC.
- Mahbub RASHED
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED U...
- Publication number 20150113484
- Publication date Apr 23, 2015
- GLOBALFOUNDRIES INC.
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COLOR-INSENSITIVE RULES FOR ROUTING STRUCTURES
- Publication number 20150067633
- Publication date Mar 5, 2015
- GLOBALFOUNDRIES Inc.
- Lei YUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...
- Publication number 20150028489
- Publication date Jan 29, 2015
- GLOBALFOUNDRIES INC.
- Lei YUAN
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DOUBLE SIDEWALL IMAGE TRANSFER PROCESS
- Publication number 20140353765
- Publication date Dec 4, 2014
- Youngtag WOO
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WIDE PIN FOR IMPROVED CIRCUIT ROUTING
- Publication number 20140353842
- Publication date Dec 4, 2014
- Lei Yuan
- G06 - COMPUTING CALCULATING COUNTING

Jongwook Kye

Person

Patents Grantslast 30 patents

Methods, apparatus and system for a passthrough-based architecture

Methods of patterning variable width metallization lines

Integrated circuit structure including power rail and tapping wire...

Structure with local contact for shorting a gate electrode to a sou...

Method, apparatus, and system for two-dimensional power rail to ena...

Transistor contacts self-aligned in two dimensions

Methods, apparatus and system for a passthrough-based architecture

Methods of design rule checking of circuit designs

Method, apparatus, and system for improved standard cell design and...

Method of forming self aligned continuity blocks for mandrel and no...

Transistor contacts self-aligned two dimensions

Methods of generating circuit layouts that are to be manufactured u...

Methods of generating circuit layouts using self-alligned double pa...

Self-aligned double patterning process for metal routing

Wide pin for improved circuit routing

Method and apparatus for assisted metal routing

Methods to utilize merged spacers for use in fin generation in tape...

Metal segments as landing pads and local interconnects in an IC device

Middle of-line architecture for dense library layout using M0 hand-...

Self-aligned double patterning process for two dimensional patterns

MOL architecture enabling ultra-regular cross couple

Color-insensitive rules for routing structures

Mask-aware routing and resulting device

Utilization of block-mask and cut-mask for forming metal routing in...

Method and apparatus for modified cell architecture and the resulti...

Methods of patterning line-type features using a multiple patternin...

Method for increasing the robustness of a double patterning router...

Transistor contacts self-aligned in two dimensions

Cross-coupling-based design using diffusion contact structures

Color-insensitive rules for routing structures

Patents Applicationslast 30 patents

METHODS OF PATTERNING VARIABLE WIDTH METALLIZATION LINES

CONTACTS FOR LOCAL CONNECTIONS

INTEGRATED CIRCUIT STRUCTURE INCLUDING POWER RAIL AND TAPPING WIRE...

METHOD, APPARATUS, AND SYSTEM FOR TWO-DIMENSIONAL POWER RAIL TO ENA...

METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE

METHOD, APPARATUS, AND SYSTEM FOR IMPROVED CELL DESIGN HAVING UNIDI...

METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE

TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS

METHODS OF DESIGN RULE CHECKING OF CIRCUIT DESIGNS

METHODS, APPARATUS AND SYSTEM FOR FABRICATING FINFET DEVICES USING...

METHOD, APPARATUS, AND SYSTEM FOR IMPROVED STANDARD CELL DESIGN AND...

SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR METAL ROUTING

SELF-ALIGNED DOUBLE PATTERNING PROCESS FOR TWO DIMENSIONAL PATTERNS

METAL SEGMENTS AS LANDING PADS AND LOCAL INTERCONNECTS IN AN IC DEVICE

METHOD AND APPARATUS FOR ASSISTED METAL ROUTING

TRANSISTOR CONTACTS SELF-ALIGNED TWO DIMENSIONS

MASK-AWARE ROUTING AND RESULTING DEVICE

WIDE PIN FOR IMPROVED CIRCUIT ROUTING

FORMING GATE TIE BETWEEN ABUTTING CELLS AND RESULTING DEVICE

METHODS OF GENERATING CIRCUIT LAYOUTS USING SELF-ALLIGNED DOUBLE PA...

TRANSISTOR CONTACTS SELF-ALIGNED IN TWO DIMENSIONS

METHODS OF PATTERNING LINE-TYPE FEATURES USING A MULTIPLE PATTERNIN...

COLOR-INSENSITIVE RULES FOR ROUTING STRUCTURES

METHOD AND APPARATUS FOR MODIFIED CELL ARCHITECTURE AND THE RESULTI...

MIDDLE-OF-THE-LINE CONSTRUCTS USING DIFFUSION CONTACT STRUCTURES

METHODS OF GENERATING CIRCUIT LAYOUTS THAT ARE TO BE MANUFACTURED U...

COLOR-INSENSITIVE RULES FOR ROUTING STRUCTURES

METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBL...

DOUBLE SIDEWALL IMAGE TRANSFER PROCESS

WIDE PIN FOR IMPROVED CIRCUIT ROUTING