Jorg Radecker

Person

Dresden, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Methods of recessing an active region and STI structures in a commo...
- Patent number 8,853,051
- Issue date Oct 7, 2014
- GLOBALFOUNDRIES Inc.
- Frank Jakubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods for fabricating semiconductor devices with isolation region...
- Patent number 8,679,940
- Issue date Mar 25, 2014
- GLOBALFOUNDRIES, INC.
- Frank Jakubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming isolation structures for semiconductor devices
- Patent number 8,642,419
- Issue date Feb 4, 2014
- GLOBALFOUNDRIES Inc.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
STI silicon nitride cap for flat FEOL topology
- Patent number 8,415,214
- Issue date Apr 9, 2013
- GLOBALFOUNDRIES, INC.
- Frank Jakubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing an integrated circuit including a transistor
- Patent number 7,718,475
- Issue date May 18, 2010
- Qimonda AG
- Matthias Goldbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a self-aligning mask
- Patent number 7,125,778
- Issue date Oct 24, 2006
- Infineon Technologies AG
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for fabricating a semiconductor structure with an encapsulat...
- Patent number 6,908,831
- Issue date Jun 21, 2005
- Infineon Technologies AG
- Lincoln O'Riain
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS OF RECESSING AN ACTIVE REGION AND STI STRUCTURES IN A COMMO...
- Publication number 20130273709
- Publication date Oct 17, 2013
- GLOBALFOUNDRIES INC.
- Frank Jakubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES B...
- Publication number 20130221478
- Publication date Aug 29, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS FOR FABRICATING SEMICONDUCTOR DEVICES WITH ISOLATION REGION...
- Publication number 20130217205
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Frank Jakubowski
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES
- Publication number 20130214381
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR D...
- Publication number 20130214392
- Publication date Aug 22, 2013
- GLOBALFOUNDRIES INC.
- Stephan Kronholz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STI SILICON NITRIDE CAP FOR FLAT FEOL TOPOLOGY
- Publication number 20120187450
- Publication date Jul 26, 2012
- GLOBALFOUNDRIES INC.
- Frank JAKUBOWSKI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for manufacturing a transistor
- Publication number 20080251815
- Publication date Oct 16, 2008
- Matthias Goldbach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit formed on a semiconductor substrate
- Publication number 20070105302
- Publication date May 10, 2007
- Infineon Technologies AG
- Albert Birner
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE WITH AN ENCAPSULAT...
- Publication number 20050095788
- Publication date May 5, 2005
- Infineon Technologies AG
- Lincoln O'Riain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for fabricating a self-aligning mask
- Publication number 20030040184
- Publication date Feb 27, 2003
- Dirk Efferenn
- H01 - BASIC ELECTRIC ELEMENTS

Jorg Radecker

Person

Patents Grantslast 30 patents

Methods of recessing an active region and STI structures in a commo...

Methods for fabricating semiconductor devices with isolation region...

Methods of forming isolation structures for semiconductor devices

STI silicon nitride cap for flat FEOL topology

Method for manufacturing an integrated circuit including a transistor

Method for fabricating a self-aligning mask

Method for fabricating a semiconductor structure with an encapsulat...

Patents Applicationslast 30 patents

METHODS OF RECESSING AN ACTIVE REGION AND STI STRUCTURES IN A COMMO...

METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES B...

METHODS FOR FABRICATING SEMICONDUCTOR DEVICES WITH ISOLATION REGION...

METHODS OF FORMING ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES

METHODS OF FORMING STEPPED ISOLATION STRUCTURES FOR SEMICONDUCTOR D...

STI SILICON NITRIDE CAP FOR FLAT FEOL TOPOLOGY

Method for manufacturing a transistor

Integrated circuit formed on a semiconductor substrate

METHOD FOR FABRICATING A SEMICONDUCTOR STRUCTURE WITH AN ENCAPSULAT...

Method for fabricating a self-aligning mask