Jose A. Baiocchi Paredes

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Performing local power gating in a processor
- Patent number 10,802,567
- Issue date Oct 13, 2020
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to perform region formation for a dynamic bin...
- Patent number 10,474,442
- Issue date Nov 12, 2019
- Intel Corporation
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing local power gating in a processor
- Patent number 9,772,674
- Issue date Sep 26, 2017
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUS TO PERFORM REGION FORMATION FOR A DYNAMIC BIN...
- Publication number 20190102150
- Publication date Apr 4, 2019
- Girish Venkatasubramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Local Power Gating In A Processor
- Publication number 20180129265
- Publication date May 10, 2018
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Local Power Gating In A Processor
- Publication number 20180129266
- Publication date May 10, 2018
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR BINARY TRANSLATIO...
- Publication number 20180011696
- Publication date Jan 11, 2018
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Local Power Gating In A Processor
- Publication number 20170371397
- Publication date Dec 28, 2017
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Local Power Gating In A Processor
- Publication number 20160085287
- Publication date Mar 24, 2016
- Intel Corporation
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Local Power Gating In A Processor
- Publication number 20140006817
- Publication date Jan 2, 2014
- Nadav Bonen
- G06 - COMPUTING CALCULATING COUNTING

Jose A. Baiocchi Paredes

Person

Patents Grantslast 30 patents

Performing local power gating in a processor

Methods and apparatus to perform region formation for a dynamic bin...

Performing local power gating in a processor

Patents Applicationslast 30 patents

METHODS AND APPARATUS TO PERFORM REGION FORMATION FOR A DYNAMIC BIN...

Performing Local Power Gating In A Processor

Performing Local Power Gating In A Processor

TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR BINARY TRANSLATIO...

Performing Local Power Gating In A Processor

Performing Local Power Gating In A Processor

Performing Local Power Gating In A Processor