JOSE A. LYON

Person

AUSTIN, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data processing system with built-in self-test and method therefor
- Patent number 10,417,104
- Issue date Sep 17, 2019
- NXP USA, INC.
- Colin MacDonald
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit and method for testing flip flop state retention
- Patent number 10,386,413
- Issue date Aug 20, 2019
- NXP USA, INC.
- Andrew H. Payne
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for testing a data processing system
- Patent number 7,444,568
- Issue date Oct 28, 2008
- FREESCALE SEMICONDUCTOR, INC.
- Gary R. Morrison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for performing dual scan path testing of an ar...
- Patent number 5,485,466
- Issue date Jan 16, 1996
- Motorola, Inc.
- Jose A. Lyon
- G01 - MEASURING TESTING
Information Patent Grant
Data processing system with shared control signals and a state mach...
- Patent number 5,276,857
- Issue date Jan 4, 1994
- Motorola, Inc.
- Eytan Hartung
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing an analog to digital converter
- Patent number 5,185,607
- Issue date Feb 9, 1993
- Motorola, Inc.
- Jose A. Lyon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for testing an analog to digital converter
- Patent number 5,175,547
- Issue date Dec 29, 1992
- Motorola, Inc.
- Jose A. Lyon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Testable multiple channel decoder
- Patent number 4,972,144
- Issue date Nov 20, 1990
- Motorola, Inc.
- Jose A. Lyon
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
CIRCUIT AND METHOD FOR TESTING FLIP FLOP STATE RETENTION
- Publication number 20180074122
- Publication date Mar 15, 2018
- FREESCALE SEMICONDUCTOR, INC.
- Andrew H. PAYNE
- G01 - MEASURING TESTING
Information Patent Application
DATA PROCESSING SYSTEM WITH BUILT-IN SELF-TEST AND METHOD THEREFOR
- Publication number 20170082686
- Publication date Mar 23, 2017
- FREESCALE SEMICONDUCTOR, INC.
- COLIN MACDONALD
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for testing a data processing system
- Publication number 20070260950
- Publication date Nov 8, 2007
- Gary R. Morrison
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory row/column replacement in an integrated circuit
- Publication number 20060007763
- Publication date Jan 12, 2006
- Paul M. Gelencser
- G11 - INFORMATION STORAGE

JOSE A. LYON

Person

Patents Grantslast 30 patents

Data processing system with built-in self-test and method therefor

Circuit and method for testing flip flop state retention

Method and apparatus for testing a data processing system

Method and apparatus for performing dual scan path testing of an ar...

Data processing system with shared control signals and a state mach...

Method and apparatus for testing an analog to digital converter

Method and apparatus for testing an analog to digital converter

Testable multiple channel decoder

Patents Applicationslast 30 patents

CIRCUIT AND METHOD FOR TESTING FLIP FLOP STATE RETENTION

DATA PROCESSING SYSTEM WITH BUILT-IN SELF-TEST AND METHOD THEREFOR

Method and apparatus for testing a data processing system

Memory row/column replacement in an integrated circuit