Jose Alvin Caparas

Person

Singapore, SG

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor device and method of forming double-sided fan-out waf...
- Patent number 11,127,668
- Issue date Sep 21, 2021
- JCET Semiconductor (Shaoxing) Co., Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for forming a low profile embedded...
- Patent number 10,622,293
- Issue date Apr 14, 2020
- JCET Semiconductor (Shaoxing) Co., Ltd.
- Seung Wook Yoon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming double-sided fan-out waf...
- Patent number 10,453,785
- Issue date Oct 22, 2019
- STATS ChipPAC Pte. Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming wire studs as vertical i...
- Patent number 10,446,523
- Issue date Oct 15, 2019
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of controlling warpage in reconstit...
- Patent number 10,297,556
- Issue date May 21, 2019
- STATS ChipPAC Pte. Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of controlling warpage in reconstit...
- Patent number 10,163,747
- Issue date Dec 25, 2018
- STATS ChipPAC Pte. Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of controlling warpage in reconstit...
- Patent number 9,607,965
- Issue date Mar 28, 2017
- STATS ChipPAC Pte. Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having wire studs as vertical interconnect in...
- Patent number 9,443,797
- Issue date Sep 13, 2016
- STATS ChipPAC Pte. Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method for forming a low profile embedded...
- Patent number 9,293,401
- Issue date Mar 22, 2016
- STATS ChipPAC, Ltd.
- Seung Wook Yoon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming thick encapsulant for st...
- Patent number 9,281,259
- Issue date Mar 8, 2016
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming discontinuous ESD protec...
- Patent number 9,153,544
- Issue date Oct 6, 2015
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming FO-WLCSP with multiple e...
- Patent number 9,142,428
- Issue date Sep 22, 2015
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with bumps and method of manufa...
- Patent number 9,076,737
- Issue date Jul 7, 2015
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with substrate and method of ma...
- Patent number 9,059,157
- Issue date Jun 16, 2015
- Stats Chippac Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of making TSV interconnect structur...
- Patent number 9,054,083
- Issue date Jun 9, 2015
- STATS ChipPAC, Ltd.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming discontinuous ESD protec...
- Patent number 8,710,635
- Issue date Apr 29, 2014
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system including wide flange leadframe
- Patent number 8,698,294
- Issue date Apr 15, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with stacked paddle and method...
- Patent number 8,664,038
- Issue date Mar 4, 2014
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device having an interconnect structure with TSV usin...
- Patent number 8,659,162
- Issue date Feb 25, 2014
- STATS ChipPAC, Ltd.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming FO-WLCSP with multiple e...
- Patent number 8,648,470
- Issue date Feb 11, 2014
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming thick encapsulant for st...
- Patent number 8,610,286
- Issue date Dec 17, 2013
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with lead-frame paddle scheme for...
- Patent number 8,569,872
- Issue date Oct 29, 2013
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wirebondless wafer level package with plated bumps and interconnects
- Patent number 8,502,376
- Issue date Aug 6, 2013
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with bumped lead and nonbumped lead
- Patent number 8,455,988
- Issue date Jun 4, 2013
- Stats Chippac Ltd.
- Jose Alvin Caparas
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with transparent encapsulation...
- Patent number 8,399,306
- Issue date Mar 19, 2013
- Stats Chippac Ltd.
- JunMo Koo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit packaging system with isolated pads and method o...
- Patent number 8,389,332
- Issue date Mar 5, 2013
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with integration port
- Patent number 8,273,602
- Issue date Sep 25, 2012
- Stats Chippac Ltd.
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with chip on lead
- Patent number 8,269,324
- Issue date Sep 18, 2012
- Stats Chippac Ltd.
- Arnel Senosa Trasporto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package system with lead support
- Patent number 8,258,609
- Issue date Sep 4, 2012
- Stats Chippac Ltd.
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device and method of forming discontinuous ESD protec...
- Patent number 8,258,012
- Issue date Sep 4, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Semiconductor Device and Method of Forming Double-Sided Fan-Out Waf...
- Publication number 20200006215
- Publication date Jan 2, 2020
- STATS ChipPAC Pte Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Controlling Warpage in Reconstit...
- Publication number 20170194228
- Publication date Jul 6, 2017
- STATS ChipPAC Pte Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Controlling Warpage in Reconstit...
- Publication number 20170133330
- Publication date May 11, 2017
- STATS ChipPAC Pte Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wire Studs as Vertical I...
- Publication number 20160336299
- Publication date Nov 17, 2016
- STATS ChipPAC Pte Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method for Forming a Low Profile Embedded...
- Publication number 20160141238
- Publication date May 19, 2016
- STATS ChipPAC, Ltd.
- Seung Wook Yoon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Double-Sided Fan-Out Waf...
- Publication number 20160043047
- Publication date Feb 11, 2016
- STATS ChipPAC, Ltd.
- Il Kwon Shim
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Controlling Warpage in Reconstit...
- Publication number 20150084213
- Publication date Mar 26, 2015
- STATS ChipPAC, Ltd.
- Kian Meng Heng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Discontinuous ESD Protec...
- Publication number 20140175623
- Publication date Jun 26, 2014
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Having an Interconnect Structure with TSV Usin...
- Publication number 20140110861
- Publication date Apr 24, 2014
- STATS ChipPAC, Ltd.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming FO-WLCSP with Multiple E...
- Publication number 20140077381
- Publication date Mar 20, 2014
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Wire Studs as Vertical I...
- Publication number 20140077364
- Publication date Mar 20, 2014
- STATS ChipPAC, Ltd.
- Pandi C. Marimuthu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Thick Encapsulant for St...
- Publication number 20140061944
- Publication date Mar 6, 2014
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MA...
- Publication number 20130320525
- Publication date Dec 5, 2013
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method for Forming a Low Profile Embedded...
- Publication number 20130228917
- Publication date Sep 5, 2013
- STATS ChipPAC, Ltd.
- Seung Wook Yoon
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Thick Encapsulant for St...
- Publication number 20130147054
- Publication date Jun 13, 2013
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Discontinuous ESD Protec...
- Publication number 20120292749
- Publication date Nov 22, 2012
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSPARENT ENCAPSULATION...
- Publication number 20120241927
- Publication date Sep 27, 2012
- JunMo Koo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming FO-WLCSP with Multiple E...
- Publication number 20120187568
- Publication date Jul 26, 2012
- STATS ChipPAC, Ltd.
- Yaojian Lin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device Having an Interconnect Structure with TSV Usin...
- Publication number 20120013004
- Publication date Jan 19, 2012
- STATS ChipPAC, Ltd.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD O...
- Publication number 20110284999
- Publication date Nov 24, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming Discontinuous ESD Protec...
- Publication number 20110278703
- Publication date Nov 17, 2011
- STATS ChipPAC, Ltd.
- Reza A. Pagaila
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Wirebondless Wafer Level Package with Plated Bumps and Interconnects
- Publication number 20110204512
- Publication date Aug 25, 2011
- STATS ChipPAC, Ltd.
- Zigmund R. Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CIRCUITRY STACKING AND MET...
- Publication number 20110068447
- Publication date Mar 24, 2011
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-...
- Publication number 20100320590
- Publication date Dec 23, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMPS AND METHOD OF MANUFA...
- Publication number 20100320589
- Publication date Dec 23, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Device and Method of Forming an Interconnect Structur...
- Publication number 20100308443
- Publication date Dec 9, 2010
- STATS ChipPAC, Ltd.
- Nathapong Suthiwongsunthorn
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED PADDLE AND METHOD...
- Publication number 20100140763
- Publication date Jun 10, 2010
- Zigmund Ramirez Camacho
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
LARGE DIE PACKAGE STRUCTURES AND FABRICATION METHOD THEREFOR
- Publication number 20100140766
- Publication date Jun 10, 2010
- Jeffrey D. Punzalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CHIP ON LEAD
- Publication number 20100006993
- Publication date Jan 14, 2010
- Arnel Senosa Trasporto
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR...
- Publication number 20100001384
- Publication date Jan 7, 2010
- Henry Descalzo Bathan
- H01 - BASIC ELECTRIC ELEMENTS

Jose Alvin Caparas

Person

Patents Grantslast 30 patents

Semiconductor device and method of forming double-sided fan-out waf...

Semiconductor device and method for forming a low profile embedded...

Semiconductor device and method of forming double-sided fan-out waf...

Semiconductor device and method of forming wire studs as vertical i...

Semiconductor device and method of controlling warpage in reconstit...

Semiconductor device and method of controlling warpage in reconstit...

Semiconductor device and method of controlling warpage in reconstit...

Semiconductor device having wire studs as vertical interconnect in...

Semiconductor device and method for forming a low profile embedded...

Semiconductor device and method of forming thick encapsulant for st...

Semiconductor device and method of forming discontinuous ESD protec...

Semiconductor device and method of forming FO-WLCSP with multiple e...

Integrated circuit packaging system with bumps and method of manufa...

Integrated circuit packaging system with substrate and method of ma...

Semiconductor device and method of making TSV interconnect structur...

Semiconductor device and method of forming discontinuous ESD protec...

Integrated circuit package system including wide flange leadframe

Integrated circuit packaging system with stacked paddle and method...

Semiconductor device having an interconnect structure with TSV usin...

Semiconductor device and method of forming FO-WLCSP with multiple e...

Semiconductor device and method of forming thick encapsulant for st...

Integrated circuit package system with lead-frame paddle scheme for...

Wirebondless wafer level package with plated bumps and interconnects

Integrated circuit package system with bumped lead and nonbumped lead

Integrated circuit packaging system with transparent encapsulation...

Integrated circuit packaging system with isolated pads and method o...

Integrated circuit package system with integration port

Integrated circuit package system with chip on lead

Integrated circuit package system with lead support

Semiconductor device and method of forming discontinuous ESD protec...

Patents Applicationslast 30 patents

Semiconductor Device and Method of Forming Double-Sided Fan-Out Waf...

Semiconductor Device and Method of Controlling Warpage in Reconstit...

Semiconductor Device and Method of Controlling Warpage in Reconstit...

Semiconductor Device and Method of Forming Wire Studs as Vertical I...

Semiconductor Device and Method for Forming a Low Profile Embedded...

Semiconductor Device and Method of Forming Double-Sided Fan-Out Waf...

Semiconductor Device and Method of Controlling Warpage in Reconstit...

Semiconductor Device and Method of Forming Discontinuous ESD Protec...

Semiconductor Device Having an Interconnect Structure with TSV Usin...

Semiconductor Device and Method of Forming FO-WLCSP with Multiple E...

Semiconductor Device and Method of Forming Wire Studs as Vertical I...

Semiconductor Device and Method of Forming Thick Encapsulant for St...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH SUBSTRATE AND METHOD OF MA...

Semiconductor Device and Method for Forming a Low Profile Embedded...

Semiconductor Device and Method of Forming Thick Encapsulant for St...

Semiconductor Device and Method of Forming Discontinuous ESD Protec...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TRANSPARENT ENCAPSULATION...

Semiconductor Device and Method of Forming FO-WLCSP with Multiple E...

Semiconductor Device Having an Interconnect Structure with TSV Usin...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH ISOLATED PADS AND METHOD O...

Semiconductor Device and Method of Forming Discontinuous ESD Protec...

Wirebondless Wafer Level Package with Plated Bumps and Interconnects

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH CIRCUITRY STACKING AND MET...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH A LEADFRAME HAVING RADIAL-...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH BUMPS AND METHOD OF MANUFA...

Semiconductor Device and Method of Forming an Interconnect Structur...

INTEGRATED CIRCUIT PACKAGING SYSTEM WITH STACKED PADDLE AND METHOD...

LARGE DIE PACKAGE STRUCTURES AND FABRICATION METHOD THEREFOR

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH CHIP ON LEAD

INTEGRATED CIRCUIT PACKAGE SYSTEM WITH LEAD-FRAME PADDLE SCHEME FOR...