Jose Delvalle

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Costa Mesa, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Module having at least one thermally conductive layer between print...
- Patent number 8,971,045
- Issue date Mar 3, 2015
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Module having at least two surfaces and at least one thermally cond...
- Patent number 8,345,427
- Issue date Jan 1, 2013
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Module having at least two surfaces and at least one thermally cond...
- Patent number 7,839,645
- Issue date Nov 23, 2010
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High density module having at least two substrates and at least one...
- Patent number 7,630,202
- Issue date Dec 8, 2009
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High density memory module using stacked printed circuit boards
- Patent number 7,375,970
- Issue date May 20, 2008
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
High density memory module using stacked printed circuit boards
- Patent number 7,254,036
- Issue date Aug 7, 2007
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
- Publication number 20110110047
- Publication date May 12, 2011
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
MODULE HAVING AT LEAST TWO SURFACES AND AT LEAST ONE THERMALLY COND...
- Publication number 20100110642
- Publication date May 6, 2010
- Netlist, Inc.
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH DENSITY MODULE HAVING AT LEAST TWO SUBSTRATES AND AT LEAST ONE...
- Publication number 20080316712
- Publication date Dec 25, 2008
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
HIGH DENSITY MEMORY MODULE USING STACKED PRINTED CIRCUIT BOARDS
- Publication number 20080007921
- Publication date Jan 10, 2008
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
High density memory module using stacked printed circuit boards
- Publication number 20060044749
- Publication date Mar 2, 2006
- Robert S. Pauley
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR